参数资料
型号: ADUC845BCPZ8-3
厂商: ANALOG DEVICES INC
元件分类: 微控制器/微处理器
英文描述: 8-BIT, FLASH, 12.58 MHz, MICROCONTROLLER, QCC56
封装: 8 X 8 MM, LEAD FREE, MO-220-VLLD-2, LFCSP-56
文件页数: 31/108页
文件大小: 1940K
代理商: ADUC845BCPZ8-3
ADuC845/ADuC847/ADuC848
Rev. B | Page 29 of 108
ADC Noise Performance with Chop Enabled (CHOP = 0)
noise and output peak-to-peak resolution in bits (rounded to
the nearest 0.5 LSB) for some typical output update rates for th
ADuC845, ADuC847, and ADuC848. The numbers are typica
and are generated at a differential input voltage of 0 V and a
common-mode voltage of 2.5 V. The output update rate is
selected via the SF7 to SF0 bits in the SF filter register. It is
important to note that the peak-to-peak resolution figures
represent the resolution for which there is no code flicker
within a 6-sigma limit.
The outp
s
e
l
ut noise comes from two sources. The first source is
the electrical noise in the semic
uctor devices (device noise)
ges.
ges, the rms noise numbers are in the same
Table 10. ADuC845 and ADuC847 Typical Output RMS Noise (V) vs. Input Range and Update Rate with Chop Enabled
Input Range
ond
used in the implementation of the modulator. The second
source is quantization noise, which is added when the analog
input is converted to the digital domain. The device noise is at a
low level and is independent of frequency. The quantization
noise starts at an even lower level but rises rapidly with increasing
frequency to become the dominant noise source.
The numbers in the tables are given for the bipolar input ran
For the unipolar ran
range as the bipolar figures, but the peak-to-peak resolution is
based on half the signal range, which effectively means losing
1 bit of resolution.
SF Word
Data Update Rate (Hz)
V
±640 mV
±1.28 V
±2.56 V
±20 mV
±40 mV
±80 mV
±160 mV
±320 m
13
105.03
1.75
1.30
1.65
1.5
2.1
3.1
7.15
13.3
23
59.36
1.25
0.95
1.08
0.94
1.0
1.87
3.24
7.1
27
50.56
1.0
0.85
1.13
1.56
2.9
3.6
69
19.79
0.63
0.68
0.52
0.7
0.61
1.1
1.3
2.75
255
5.35
0.31
0.38
0.34
0.32
0.4
0.45
0.68
1.22
Table 11. ADuC845 and ADuC847 Typical Peak-to-Peak Resolution (Bits) vs. Input Range and Update Rate with Chop Enabled
Input Range
SF Word
Data Update Rate (Hz)
±20 mV
±40 mV
±80 mV
±160 mV
±320 mV
±640 mV
±1.28 V
±2.56 V
13
105.03
12
13
14
15
15.5
16
23
59.36
12
13.5
14.5
15.5
16.5
17
16.5
27
50.56
12.5
13.5
15
16
16.5
17
17.5
69
19.79
13
14
15.5
16
17.5
18
255
5.35
14.5
15
16
17
18
18.5
19
19.5
Table 12. ADuC848 Typical Output Noise (V) vs. Input Range and Update Rate with Chop Enabled
Input Range
SF Word
Data Update Rate (Hz)
±20 mV
±40 mV
±80 mV
±160 mV
±320 mV
±640 mV
±1.28 V
±2.56 V
13
105.03
1.75
1.30
1.65
1.5
2.1
3.1
7.15
13.3
23
59.36
1.25
0.95
1.08
0.94
1.0
1.87
3.24
7.1
27
50.56
1.0
0.85
1.13
1.56
2.9
3.6
69
19.79
0.63
0.68
0.52
0.7
0.61
1.1
1.3
2.75
255
5.35
0.31
0.38
0.34
0.32
0.4
0.45
0.68
1.22
Table 13. ADuC848 Typical Peak-to-Peak Resolution (Bits) vs. Input Range and Update Rate with Chop Enabled
Input Range
SF Word
Data Update Rate (Hz)
±20 mV
±40 mV
±80 mV
±160 mV
±320 mV
±640 mV
±1.28 V
±2.56 V
13
105.03
12
13
14
15
15.5
16
23
59.36
12
13.5
14.5
15.5
16
17
16
27
50.56
12.5
13.5
15
16
69
19.79
13
14
15.5
16
255
5.35
14.5
15
16
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