参数资料
型号: ADUC845BCPZ8-3
厂商: ANALOG DEVICES INC
元件分类: 微控制器/微处理器
英文描述: 8-BIT, FLASH, 12.58 MHz, MICROCONTROLLER, QCC56
封装: 8 X 8 MM, LEAD FREE, MO-220-VLLD-2, LFCSP-56
文件页数: 42/108页
文件大小: 1940K
代理商: ADUC845BCPZ8-3
ADuC845/ADuC847/ADuC848
Rev. B | Page 39 of 108
co trol
configured via a number of SFRs that are mentioned here and described in more detail in the following
R In
ce
ame
Description
FUNCTIONAL DESCRIPTION
ADC SFR INTERFACE
The ADCs are
n
led and
sections.
Table 22. ADC SF
terfa
N
ADCSTAT
ADC Status Register. Holds the general status of the primary and auxiliary (ADuC845 only) ADCs.
ADCMODE
ADC Mode Register. Controls the general modes of operation for primary and auxiliary (ADuC845 only) ADCs.
ADC0CON
ary ADC Con
onfiguration of the primary ADC.
1
Prim
trol Register 1. Controls the specific c
ADC0CON
y ADC Con
nfiguration of the primary ADC.
2
Primar
trol Register 2. Controls the specific co
ADC1CON
iliary ADC Con
Aux
trol Register. Controls the specific configuration of the auxiliary ADC. ADuC845 only.
SF
Sinc Filter Registe
only) ADC update
r. Configures the decimation factor for the Sinc3 filter and, therefore, the primary and auxiliary (ADuC845
rates.
ICON
t Source Co
Curren
ntrol Register. Allows user control of the various on-chip current source options.
ADC0L/M/H
Primary ADC 24-b
lable on
the ADuC848.
it (16-bit on the ADuC848) conversion result is held in these three 8-bit registers. ADC0L is not avai
ADC1L/M/H
Auxiliary ADC 24-bit conversion result is held in these two 8-bit registers. ADuC845 only.
OF0L/M/H
-b
these three 8-bit registers. OF0L is not available on the ADuC848.
Primary ADC 24 it offset calibration coefficient is held in
OF1L/H
C 16-
Auxiliary AD
bit offset calibration coefficient is held in these two 8-bit registers. ADuC845 only.
GN0L/M/H
Primary ADC 24-bit gain cali
ADuC848.
bration coefficient is held in these three 8-bit registers. GN0L is not available on the
GN1L/H
xiliary ADC 16-
Au
bit gain calibration coefficient is held in these two 8-bit registers. ADuC845 only.
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