- 您现在的位置：买卖IC网 > PDF目录362733 > Enhanced Am486 dx2 (Advanced Micro Devices, Inc.) High-Performance Design On-Chip Integration Complete 32-Bit Architecture Micrprocessor(高性能单片32位微处理器) PDF资料下载
参数资料
| 型号： | Enhanced Am486 dx2 |
| 厂商： | Advanced Micro Devices, Inc. |
| 英文描述： | High-Performance Design On-Chip Integration Complete 32-Bit Architecture Micrprocessor(高性能单片32位微处理器) |
| 中文描述： | 高性能设计的片上集成完整的32位架构Micrprocessor（高性能单片32位微处理器） |
| 文件页数： | 29/69页 |
| 文件大小： | 1068K |
| 代理商： | ENHANCED AM486 DX2 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页当前第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页
Enhanced Am486 Microprocessor
AMD
29
PRELIMINARY
Step 8 As an example, AHOLD is now removed. In the
next clock cycle, the current address of the
write-back access is driven onto the address
bus.
Step 9 The write-back access is finished when BLAST
and BRDY both transition to 0.
Step 10 In the clock cycle after the final write-back access,
the snooping cache drives HITM back to 1.
The status of the snooped and written-back line is now
either shared (INV = 0) or is changed to invalid (INV = 1).
4.8.6
Reordering of Write-Backs (AHOLD) with
BOFF
As seen previously, the Bus Interface Unit (BIU) com-
pletes the processor-initiated access first if the snooping
access occurs after the start of the processor-initiated
access. If the HITM signal occurs one clock cycle before
the ADS = 0 of the processor-initiated access, the write-back
receives priority and is executed first.
However, if the snooping access is executed after the
start of the processor-initiated access, there is a meth-
odology to reorder the access order. The BOFF signal
delays outstanding processor-initiated cycles so that a
snoop write-back can occur immediately (see Figure 13).
Scenario
: If there are outstanding processor-initiated cy-
cles on the bus, asserting BOFF clears the bus pipeline. If
a snoop causes HITM to be asserted, the first cycle issued
by the microprocessor after deassertion of BOFF is the
write-back cycle. After the write-back cycle, it reissues the
aborted cycles. This translates into the following sequence:
Step 1 The processor starts a cacheable burst read
cycle.
Step 2 One clock cycle later, AHOLD is asserted. This
switches the address bus into an input one
clock cycle after AHOLD is asserted.
Step 3 Two clock cycles after AHOLD is asserted, the
EADS and INV signals are asserted to start the
snooping cycle.
Step 4 Two clock cycles after EADS is asserted, HITM
becomes valid. The line is modified, therefore
HITM = 0.
Step 5 Note that the processor-initiated access is not
completed because BLAST = 1.
Step 6 With HITM going Low, the core system logic as-
serts BOFF in the next clock cycle to the snooping
processor to reorder the access. BOFF overrides
BRDY. Therefore, the partial read is not used. It is
reread later.
Step 7 One clock cycle later BOFF is deasserted. The
write-back access starts one clock cycle later be-
cause the BOFF has cleared the bus pipeline.
Data
HITM
EADS
INV
Read
BRDY
AHOLD
BLAST
ADS
W/R
M/IO
ADR
CLK
W n+4
W n
W n+8
W n+C
Figure 12. Snoop Hit Cycle with Write-Back
Note:
The circled numbers in this figure represent the steps in section 4.8.5.3.
1
7
8
9
5
4
6
3
2
CACHE
from CPU
to CPU
from CPU
相关PDF资料 |
PDF描述 |
|---|---|
| Enhanced Am486 dx4 | High-Performance Design On-Chip Integration Complete 32-Bit Architecture Micrprocessor(高性能设计片上集成完全32位体系微处理器) |
| EO12 | IRDA INFRARED TRANSCEIVER |
| EOL-62L256 | HT62L256 EOL Notification |
| EP05FA20 | FRD |
| EP05Q03L | SBD |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ENHSAURR8 | 制造商:Molex 功能描述:8 PORT MACHINE MOUNT SWITCH 制造商:Molex 功能描述:COMPUTERS, NETWORK SWITCHES CONNECTIVITY, No. of Ports:8, Data Rate Max:100Mbps, |
| ENHSDURR5 | 制造商:Molex 功能描述:COMPUTERS, NETWORK SWITCHES CONNECTIVITY, No. of Ports:5, Switch Mounting:DIN Ra 制造商:Molex 功能描述:ETHERNET DIN RAIL SWITCH 5PORT |
| ENHSDURR9 | 制造商:MOLEX/WOODHEAD 功能描述:Ethernet Network Switch 制造商:Molex 功能描述:ETHERNET NETWORK SWITCH, No. of Ports:9, Data Rate Max:100Mbps, Switch Mounting: |
| ENI-110 | 功能描述:冲压机与冲模 NON-IMPACT PUNCHDOWN TOOL RoHS:否 制造商:Souriau 大小: 产品:Dies 类型:Crimping 描述/功能: |
| ENICSF2811PBKA | 制造商:Texas Instruments 功能描述: |
发布紧急采购，3分钟左右您将得到回复。