参数资料
型号: EP2C20F256I6N
厂商: ALTERA CORP
元件分类: FPGA
英文描述: FPGA, 1196 CLBS, PBGA256
封装: LEAD FREE, FBGA-256
文件页数: 145/168页
文件大小: 2206K
代理商: EP2C20F256I6N
3–4
Altera Corporation
Cyclone II Device Handbook, Volume 1
February 2007
IEEE Std. 1149.1 (JTAG) Boundary Scan Support
The Cyclone II device instruction register length is 10 bits and the
USERCODE register length is 32 bits. Tables 3–2 and 3–3 show the
boundary-scan register length and device
IDCODE information for
Cyclone II devices.
For more information on the Cyclone II JTAG specifications, refer to the
DC Characteristics & Timing Specifications chapter in the Cyclone II Device
Handbook, Volume 1.
Table 3–2. Cyclone II Boundary-Scan Register Length
Device
Boundary-Scan Register Length
EP2C5
498
EP2C8
597
EP2C15
969
EP2C20
969
EP2C35
1,449
EP2C50
1,374
EP2C70
1,890
Table 3–3. 32-Bit Cyclone II Device IDCODE
Device
IDCODE (32 Bits) (1)
Version (4 Bits)
Part Number (16 Bits)
Manufacturer Identity (11 Bits)
LSB (1 Bit) (2)
EP2C5
0000
0010 0000 1011 0001
000 0110 1110
1
EP2C8
0000
0010 0000 1011 0010
000 0110 1110
1
EP2C15
0000
0010 0000 1011 0011
000 0110 1110
1
EP2C20
0000
0010 0000 1011 0011
000 0110 1110
1
EP2C35
0000
0010 0000 1011 0100
000 0110 1110
1
EP2C50
0000
0010 0000 1011 0101
000 0110 1110
1
EP2C70
0000
0010 0000 1011 0110
000 0110 1110
1
Notes to Table 3–3:
(1)
The most significant bit (MSB) is on the left.
(2)
The IDCODE’s least significant bit (LSB) is always 1.
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EP2C20F256I8GA 制造商:Altera Corporation 功能描述:
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