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型号： HW-SPAR3AN-SK-UNI-G
厂商： Xilinx Inc
文件页数： 40/140页
文件大小： 0K
描述： KIT STARTER SPARTAN-3 AN
产品变化通告： Adapter Replacement 23/May/2008
标准包装： 1
系列： Spartan®-3AN
类型： FPGA
适用于相关产品： Spartan-3AN XC3S700AN-FG484，XCF04S-VOG20C
所含物品： 面板、缆线、软件、数据表和用户手册
相关产品： XC3S700AN-5FGG484C-ND - IC FPGA SPARTAN-3A 700K 484-FBGA
122-1598-ND - IC FPGA SPARTAN -3AN700K 484FBGA
122-1556-ND - IC SPARTAN-3AN FPGA 700K 484FBGA
其它名称： 122-1528
HW-SPAR3AN-SK-UNI-G-PROMO
HW-SPAR3AN-SK-UNI-G-PROMO-ND
Chapter 4: FPGA Configuration Options
R
Xilinx Platform Flash Configuration PROM(s)
The Spartan-3A/3AN Starter Kit board includes a Xilinx Platform Flash configuration
interface. A single 4 Mbit XCF04S Platform Flash PROM appears in the JTAG chain with
the FPGA.
Caution! The J46 jumper, shown in Table 4-2, page 40 , enables or disables the Platform Flash
PROM on the board. Be aware of potential data contention issues with the SPI serial Flash and
the D0 line of the parallel NOR Flash, depending on the current FPGA “Configuration Mode
Jumpers” , shown in Table 4-1 .
Caution! If the J46 jumper shown in Table 4-2, page 40 is set for “Always Enabled”, then the
FPGA’s INIT_B pin controls the Platform Flash PROM’s OE/RESET input. The INIT_B pin must
be High to read any data, other than from the Platform Flash PROM.
When using the Platform Flash PROM to configure the FPGA, the configuration mode
jumpers must be set for Master Serial mode, as shown in Table 4-2 . If using any other
configuration mode, the Platform Flash PROM must be disabled.
Table 4-2:
Platform Flash Enable Jumper (J46)
Platform Flash
Mode
Disabled
(no jumper)
Enabled during
FPGA
Configuration
Platform Flash
Enable (J46)
DONE
CE
PROM
GND
J46
DONE
CE
PROM
GND
J46
Allowed FPGA
Configuration Mode
Any
(see Table 4-1 )
Master Serial
or JTAG
Precautions/
Contention
None. Platform Flash disabled.
The FPGA application has full
access to SPI serial Flash and
parallel NOR Flash PROMs after
configuration.
None. Platform Flash enabled
during configuration and
disabled after configuration. The
FPGA application has full access
to SPI serial Flash and parallel
NOR Flash PROMs after
configuration.
DONE
Platform Flash continuously
enabled. The FPGA application
Always
Enabled
CE
PROM
GND
J46
Master Serial
or JTAG
can read additional data from
Platform Flash after
configuration as described in
application note XAPP694 :
Reading User Data from
Configuration PROMs . The FPGA
application has no read access to
SPI Flash or parallel NOR Flash.
PROG Push-Button Switch
The PROG push-button switch, labeled in Figure 4-1 , forces the FPGA to reconfigure from
the configuration memory source selected by the “Configuration Mode Jumpers,” page 39 .
Press and release this button to restart the FPGA configuration process at any time.
40
www.xilinx.com Spartan-3A/3AN FPGA Starter Kit Board User Guide
UG334 (v1.1) June 19, 2008
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