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参数资料
型号： HW-SPAR3AN-SK-UNI-G
厂商： Xilinx Inc
文件页数： 51/140页
文件大小： 0K
描述： KIT STARTER SPARTAN-3 AN
产品变化通告： Adapter Replacement 23/May/2008
标准包装： 1
系列： Spartan®-3AN
类型： FPGA
适用于相关产品： Spartan-3AN XC3S700AN-FG484，XCF04S-VOG20C
所含物品： 面板、缆线、软件、数据表和用户手册
相关产品： XC3S700AN-5FGG484C-ND - IC FPGA SPARTAN-3A 700K 484-FBGA
122-1598-ND - IC FPGA SPARTAN -3AN700K 484FBGA
122-1556-ND - IC SPARTAN-3AN FPGA 700K 484FBGA
其它名称： 122-1528
HW-SPAR3AN-SK-UNI-G-PROMO
HW-SPAR3AN-SK-UNI-G-PROMO-ND
R
Table 5-3:
DB3 DB2
(S/C) (R/L)
Shift Patterns According to S/C and R/L Bits
Operation
LCD Controller
0
0
1
1
0
1
0
1
Shift the cursor position to the left. The address counter is decremented by one.
Shift the cursor position to the right. The address counter is incremented by one.
Shift the entire display to the left. The cursor follows the display shift. The
address counter is unchanged.
Shift the entire display to the right. The cursor follows the display shift. The
address counter is unchanged.
Function Set
Sets the interface data length, the number of display lines, and the character font.
The Starter Kit board supports a single function set with value 0x28.
Execution Time: 40 μ s
Set CG RAM Address
Sets the initial CG RAM address.
After this command, all subsequent read or write operations to the display are to or from
CG RAM.
Execution Time: 40 μ s
Set DD RAM Address
Sets the initial DD RAM address.
After this command, all subsequent read or write operations to the display are to or from
DD RAM. The addresses for displayed characters appear in Figure 5-3 .
Execution Time: 40 μ s
Read Busy Flag and Address
Reads the Busy flag (BF) to determine if an internal operation is in progress, and reads the
current address counter contents.
BF = 1 indicates that an internal operation is in progress. The next instruction is not
accepted until BF is cleared or until the current instruction is allowed the maximum time to
execute.
This command also returns the present value of the address counter. The address counter
is used for both CG RAM and DD RAM addresses. The specific context depends on the
most recent Set CG RAM Address or Set DD RAM Address command issued.
Execution Time: 1 μ s
Write Data to CG RAM or DD RAM
Writes data into DD RAM if the command follows a previous Set DD RAM Address
command, or writes data into CG RAM if the command follows a previous Set CG RAM
Address command.
Spartan-3A/3AN FPGA Starter Kit Board User Guide www.xilinx.com
UG334 (v1.1) June 19, 2008
51
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HW-SPAR3A-SK-UNI-G 功能描述:KIT STARTER W/SPARTAN-3A RoHS:是 类别:编程器，开发系统 >> 通用嵌入式开发板和套件（MCU、DSP、FPGA、CPLD等） 系列:Spartan®-3A 标准包装:1 系列:PICDEM™ 类型:MCU 适用于相关产品:PIC10F206，PIC16F690，PIC16F819 所含物品:板，线缆，元件，CD，PICkit 编程器 产品目录页面:659 (CN2011-ZH PDF)
HW-SPAR3A-SK-UNI-G-J 功能描述:KIT STARTER W/SPARTAN-3A RoHS:是 类别:编程器，开发系统 >> 通用嵌入式开发板和套件（MCU、DSP、FPGA、CPLD等） 系列:Spartan®-3A 产品培训模块:Blackfin® Processor Core Architecture Overview Blackfin® Device Drivers Blackfin® Optimizations for Performance and Power Consumption Blackfin® System Services 特色产品:Blackfin? BF50x Series Processors 标准包装:1 系列:Blackfin® 类型:DSP 适用于相关产品:ADSP-BF548 所含物品:板，软件，4x4 键盘，光学拨轮，QVGA 触摸屏 LCD 和 40G 硬盘 配用:ADZS-BFBLUET-EZEXT-ND - EZ-EXTENDER DAUGHTERBOARDADZS-BFLLCD-EZEXT-ND - BOARD EXT LANDSCAP LCD INTERFACE 相关产品:ADSP-BF542BBCZ-4A-ND - IC DSP 16BIT 400MHZ 400CSBGAADSP-BF544MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542KBCZ-6A-ND - IC DSP 16BIT 600MHZ 400CSBGAADSP-BF547MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF548BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF547BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF544BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF542BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGA
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