参数资料
型号: HW-SPAR3AN-SK-UNI-G
厂商: Xilinx Inc
文件页数: 81/140页
文件大小: 0K
描述: KIT STARTER SPARTAN-3 AN
产品变化通告: Adapter Replacement 23/May/2008
标准包装: 1
系列: Spartan®-3AN
类型: FPGA
适用于相关产品: Spartan-3AN XC3S700AN-FG484,XCF04S-VOG20C
所含物品: 面板、缆线、软件、数据表和用户手册
相关产品: XC3S700AN-5FGG484C-ND - IC FPGA SPARTAN-3A 700K 484-FBGA
122-1598-ND - IC FPGA SPARTAN -3AN700K 484FBGA
122-1556-ND - IC SPARTAN-3AN FPGA 700K 484FBGA
其它名称: 122-1528
HW-SPAR3AN-SK-UNI-G-PROMO
HW-SPAR3AN-SK-UNI-G-PROMO-ND
R
DAC_CS
SPI Communication
SPI_MOSI
31
30
29
SPI_SCK
DAC_OUT
Previous 31
Previous 30
Previous 29
UG330_c9_03 071906
Figure 10-3:
SPI Communication Waveforms
After driving the DAC_CS slave select signal Low, the FPGA transmits data on the
SPI_MOSI signal, MSB first. The LTC2624 captures input data (SPI_MOSI) on the rising
edge of SPI_SCK; the data must be valid for at least 4 ns relative to the rising clock edge.
The LTC2624 DAC transmits its data on the DAC_OUT signal on the falling edge of
SPI_SCK. The FPGA captures this data on the next rising SPI_SCK edge. The FPGA must
read the first DAC_OUT value on the first rising SPI_SCK edge after DAC_CS goes Low.
Otherwise, bit 31 is missed.
After transmitting all 32 data bits, the FPGA completes the SPI bus transaction by
returning the DAC_CS slave select signal High. The High-going edge starts the actual
digital-to-analog conversion process within the DAC.
Communication Protocol
Figure 10-4 shows the communications protocol required to interface with the LTC2624
DAC. The DAC supports both 24-bit and 32-bit protocol. The 32-bit protocol is shown.
Inside the DAC, the SPI interface is formed by a 32-bit shift register. Each 32-bit command
word consists of a command and an address, followed by a data value. As a new command
enters the DAC, the previous 32-bit command word is echoed back to the master. The
response from the DAC can be ignored although it is a useful to confirm correct
communication.
DAC_OUT
SPI_MOSI
0 Slave: LTC2624 DAC 31
x x x x 0 1 2 3 4 5 6 7 8 9 10 11 a 0 a 1 a 2 a 3 c 0 c 1 c 2 c 3 x   x   x   x   x   x   x   x
DAC_CS
lsb
msb
Master
FPGA
SPI_SCK
Don’t Care
Don’t Care
12-bit Unsigned
DATA
COMMAND
a 3
0
0
0
0
a 2
0
0
0
0
a 1
0
0
1
1
a 0
0
1
0
1
ADDRESS
DAC A
DAC B
DAC C
DAC D
1
1
1
1
All
UG334_c10_04_052407
Figure 10-4:
SPI Communications Protocol to LTC2624 DAC
Spartan-3A/3AN FPGA Starter Kit Board User Guide www.xilinx.com
UG334 (v1.1) June 19, 2008
81
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