参数资料
型号: IDT88P8342BHGI
厂商: IDT, Integrated Device Technology Inc
文件页数: 97/98页
文件大小: 0K
描述: IC SPI3-SPI4 EXCHANGE 820-PBGA
标准包装: 24
系列: *
其它名称: 88P8342BHGI
97
IDT88P8342 SPI EXCHANGE 2 x SPI-3 TO SPI-4
INDUSTRIALTEMPERATURERANGE
APRIL 10, 2006
ISSUE
DATE
DESCRIPTION
0.7
05/21/04
General Release
0.8
10/01/04
AG30 ball location changed to SPI4_I_STAT_N[1] and AF31 ball location changed to
SPI4_I_STAT_P[0] on Pin name/ball location table (section 12.2) on page 88.
0.9
03/01/05
Updated Chip Configuration Sequence (p. 41)
Update Table 21: “BIT Order Whitin a 16-BIT Address Register” (p. 45)
Update Table 27: “Indirect Access Address Register” (p. 46)
Updated Direct Access Registers (p. 48-49)
Updated Common Module Indirect Registers (p. 66)
Updated Electrical and Thermal Specification (p. 77) (the section name changed from Electrical
Characteristics to Electrical and Thermal Specification). Updated JTAG Instructions.
Added Document Revision History (p. 95)
0.91
05/09/05
Added sections System Reset and Power on Sequence (p.41).
Updated PFR to PFP in Table 49: "Module A/B indirect register" (p.55)
Updated Table 80: "SPI-4 ingress packet length configuration" (p.65)
Updated length for Reserved in Table 83: "SPI-4 ingress port descriptor" (p.65)
Added Green to Ordering information (p.96)
0.92
08/05/05
Updated Table 128: "Absolute maximum ratings" (p.78)
0.93
10/20/05
Updated Table 7: "Parallel microprocessor interface" (p.12)
Updated Table 131: "Thermal Characteristics" (p.79)
Updated Microprocessor parallel port section (p.84-87)
0.94
11/21/05
Updated Table 126: "Version number register (register_offset 0x30)" (p.77)
0.95
01/09/06
Updated Figure 4: "PHY mode SPI-3 ingress interface" (p.14)
Deleted Table 13: "NR_LID Field Encoding". Updated SPI-4 egress queues, Normal operation
section (p.26)
Updated Section 8.2.5 "SPI-4 status channel software" (p.43)
Updated Table 127: "Absolute maximum ratings" (p.78)
Updated Table 129: "Terminal Capacitance" (p.79)
1.0
04/10/06
Initial Release of Final Datasheet with new section 8.2.7 "Software Eye-Opening Check on SPI-4"
& new Figure 33. "DDR interface and eye opening check through over sampling" (p.44-45)
Updated Clock generator (pg. 39)
Updated SPI-4 ingress watermark register (pg. 71)
Updated Clock generator control register (pg. 77)
Updated Table 130: Thermal Characteristics (pg. 80)
Updated Table 132: SPI-3 AC Input/Output timing specifications (pg. 82)
Updated Table 136: OCLK[3:0] outputs and MCLK internal clock (pg. 84)
14. DATASHEET DOCUMENT REVISION HISTORY
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