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Serial Communication Controllers (SCCs)
7-134
MC68360 USER’S MANUAL
Figure 7-42. Using CD to Control Reception of Synchronous Protocols
If the CD pin is programmed to envelope the data, the CD pin must remain asserted during
frame transmission, or a CD lost error occurs. The negation of the CD pin terminates recep-
tion. If the CDS bit in the GSMR is zero, the CD pin must be sampled by the SCC before a
CD lost is recognized. Otherwise, the negation of CD immediately causes the CD lost con-
dition.
NOTE
If the CDS bit in GSMR is set, all CD transitions must occur while
the receive clock is low.
7.10.11.2 ASYNCHRONOUS PROTOCOLS. The RTS pin is asserted when the SCC data
is loaded into the transmit FIFO and a falling transmit clock occurs. The CD and CTS pins
may be used to control reception and transmission in the same manner as the synchronous
protocols. The first bit of data transmission in an asynchronous protocol is the start bit of the
first character. In addition, the UART protocol has an option for CTS flow control as
described in 7.10.16 UART Controller.
FIRST BIT OF DATA IN FRAME
LAST BIT OF FRAME DATA
RXD
CD
FIRST BIT OF FRAME DATA
LAST BIT OF FRAME DATA
RCLK
(INPUT)
CD SAMPLED LOW HERE
(INPUT)
CD SAMPLED HIGH HERE
RCLK
RXD
(INPUT)
CD
(INPUT)
CD ASSERTION IMMEDIATELY
GATES RECEPTION
CD NEGATION IMMEDIATELY
HALTS RECEPTION
NOTES:
1. CDS = 1 in GSMR; CDP = 0.
2. If CD is negated prior to the last bit of the receive frame, CD lost is signaled in the frame BD.
3. If CDP = 1, CD lost cannot occur, and CD negation has no effect on reception.
NOTES:
1. CDS = 0 in GSMR; CDP = 0.
2. If CD is negated prior to the last bit of the receive frame, CD LOST is signaled in the frame BD.
3. If CDP = 1, CD LOST cannot occur, and CD negation has no effect on reception.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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