Parallel I/O Ports
MC68360 USER’S MANUAL
For each DDx bit, the definition is as follows:
0 = General-purpose I/O. The peripheral functions of the pin are not used.
1 = Dedicated peripheral function. The pin is used by the internal module. The on-chip
peripheral function to which it is dedicated may be determined by other bits such
as these in the PBDIR.
7.14.8 Port B Example
PB0 can be configured as a general-purpose I/O pin or as an open-drain pin. It may also be
the receiver reject pin for the SCC1 Ethernet CAM interface (RRJCT1) or the SPI select
input (SPISEL). If the PB0 pin is not configured to connect to the RRJCT signal or the
SPISEL signal, then the SCC and/or SPI receives VDD on that signal.
NOTE
In the description of the PIP, the PB0 pin, as well as other port B
pins, can also be used as PIP functions. However, the PIP does
not affect the operation of port B unless it is enabled. Therefore,
the PIP description does not need to be studied by users of port
B unless the PIP will be used in the application.
7.14.9 Port C Pin Functions
Port C consists of 12 general-purpose I/O pins with interrupt capability on each pin. Refer to
Table 7-21 for the description of all port C pin options.
Table 7-21. Port CPin Assignment
PCPAR = 0
PCPAR = 1
Signal
PCDIR = 1 or PCSO
= 0
PCDIR = 0 and
PCSO = 1
PCDIR = 0
PCDIR = 1
Input to On-Chip
Peripherals
PC0
Port C0
—
RTS1
L1ST1
—
PC1
Port C1
—
RTS2
L1ST2
—
PC2
Port C2
—
RTS3/L1RQB
L1ST3
—
PC3
Port C3
—
RTS4/L1RQA
L1ST4
—
PC4
Port C4
CTS1
—
GND
PC5
Port C5
CD1
TGATE1
GND
PC6
Port C6
CTS2
—
GND
PC7
Port C7
CD2
TGATE2
GND
PC8
Port C8
CTS3
L1TSYNCB
SDACK2
CTS3 and/or
L1TSYNCB = GND
PC9
Port C9
CD3
L1RSYNCB
GND
PC10
Port C10
CTS4
L1TSYNCA
SDACK1
CTS4 and/or
L1TSYNCA = GND
PC11
Port C11
CD4
L1RSYNCA
GND
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