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Serial Management Controllers (SMCs)
7-272
MC68360 USER’S MANUAL
sponding channel. Furthermore, the user should not configure BD tables of two enabled
SMCs to overlap, or erratic operation will occur.
NOTE
RBASE and TBASE should contain a value that is divisible by 8.
7.11.4.2 SMC FUNCTION CODE REGISTERS (RFCR, TFCR). There are four separate
function code registers for the two SMC channels: two for receive data buffers (RFCRx) and
two for transmit data buffers (TFCRx). The FC entry contains the value that the user would
like to appear on the function code pins FC3–FC0 when the associated SDMA channel
accesses memory. It also controls the byte-ordering convention to be used in the transfers.
Receive Function Code Register
Bits 7–5—Reserved
MOT—Motorola
This bit should be set by the user to achieve normal operation. MOT
must be set if the
data buffer is located in external memory and has a 16-bit wide memory port size.
0 = DEC (and Intel) convention is used for byte ordering—swapped operation. It is also
called little-endian byte ordering. The bytes stored in each buffer word are reversed
as compared to the Motorola mode.
1 = Motorola byte ordering—normal operation. It is also called big-endian byte order-
ing. As data is received from the serial line and put into the buffer, the most signif-
icant byte of the buffer word contains data received earlier than the least significant
byte of the same buffer word.
FC3–FC0—Function Code 3–0
These bits contain the function code value used during this SDMA channel’s memory
accesses. The user should write bit FC3 with a one to identify this SDMA channel access
as a DMA-type access. Example: FC3–FC0 = 1000 (binary). Do not write the value 0111
(binary) to these bits.
Transmit Function Code Register
Bits 7–5—Reserved
76543210
—
MOT
FC3–FC0
76543210
—
MOT
FC3–FC0
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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