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参数资料
| 型号： | MPC8272ADS |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 69/158页 |
| 文件大小： | 0K |
| 描述： | KIT DEVELOPMENT MPC8272 |
| 标准包装： | 1 |
| 类型： | MPU |
| 适用于相关产品： | MPC8272 |
| 所含物品： | 板 |
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Board Control and Status Register - BCSR
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DSR (O) - Data Set Ready. This line is always asserted by the MPC8272ADS.
RTS (I) - Request To Send. This line is not connected in the MPC8272ADS.
CTS (O) - Clear To Send. This line is always asserted by the MPC8272ADS.
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5.10.4 USB Port
The USB port resides on the MPC8272ADS and is driven by the USB port of the MPC8272
through SCC3. A dedicated USB transceiver - the PDIUSBP11 by PHILIPS is provided,
along with a tri-state buffer, separating this port from the MPC8272’s USB port, this to
allow Port disable option and off-board use of MPC8272 USB pins. The USB can be
configured to Host or Slave mode by using JP8. Two USB connectors are supported -
type-A and type-B.
To correctly support the 2 speed modes of the USB when in slave mode, detachable pull-up
resistors (3.3V) are provided over D+ and D- lines of the USB, controlled by the USB_SPD
bit of BCSR4. When USB_SPD is in low-speed level (low) D- is pulled-up while D+
remains floating. When USB_SPD bit is in high-speed level, D+ is being pulled-up and D-
floats.
To correctly support Host mode, two pull down resistors are provided over D+ and D- lines
of the USB, controlled by JP8 settings.
Also, 5V power will optionally be provided for the USB type-A connector, controlled by
USB_VCC0 in BCSR4. When USB_VCC0 is driven low, a 5V supply will be connected to
pin 1 of the USB type-A connector.
5.10.5 PC Parallel Port
A new feature to this board is the direct connection to a PC parallel port for the purpose of
debugger connection (CodeWarrior). An on-board logic is used to interface to the parallel
port and translate the signals to COP/JTAG format. The parallel port support both EPP and
SPP modes of the parallel port in a PC. The direct connection eliminates the need for an
external command converter. When connected to a PC’s parallel port, the parallel port
connection has automatic priority over the COP/JTAG connector interface.
5.11 Board Control and Status Register - BCSR
Most of the hardware options on the MPC8272ADS are controlled or monitored by the
BCSR, which is a 32 bit wide read / write register file. The BCSR is accessed via the
MPC8272s’ memory controller (see Table 5-5) and in fact includes 8 registers: BCSR0 to
BCSR7. Since the minimum block size for a CS region is 32KBytes and only A(27:29)
lines are decoded by the BCSR for register selection, BCSR0 - BCSR7 are duplicated inside
that region.
Chapter 5. Module Design
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| MPC8309-KIT | KIT EVALUATION FOR MPC830X |
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| MPC8349E-MITX-GP | KIT REFERENCE PLATFORM MPC8349E |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MPC8272CVR | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:MPC8272 PowerQUICC II Family Hardware Specifications |
| MPC8272CVRB | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:PowerQUICC II⑩ Family Hardware Specifications |
| MPC8272CVRE | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:PowerQUICC II⑩ Family Hardware Specifications |
| MPC8272CVRI | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:PowerQUICC II⑩ Family Hardware Specifications |
| MPC8272CVRM | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:PowerQUICC II⑩ Family Hardware Specifications |
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