- 您现在的位置：买卖IC网 > PDF目录4481 > MT48H8M16LFB4-75:K TR (Micron Technology Inc)IC SDRAM 128MBIT 133MHZ 54VFBGA PDF资料下载
参数资料
| 型号： | MT48H8M16LFB4-75:K TR |
| 厂商： | Micron Technology Inc |
| 文件页数： | 33/63页 |
| 文件大小： | 0K |
| 描述： | IC SDRAM 128MBIT 133MHZ 54VFBGA |
| 标准包装： | 1 |
| 格式 - 存储器： | RAM |
| 存储器类型： | 移动 SDRAM |
| 存储容量： | 128M（8Mx16） |
| 速度： | 133MHz |
| 接口： | 并联 |
| 电源电压： | 1.7 V ~ 1.95 V |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 54-VFBGA |
| 供应商设备封装： | 54-VFBGA（8x8） |
| 包装： | 标准包装 |
| 其它名称： | 557-1531-6 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页当前第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页
128Mb: x16 Mobile SDRAM
Truth Tables
Truth Tables
Table 6:
Truth Table 2 – CKE
Notes: 1–4; notes appear below table
CKE n-1
L
CKE n
L
Current State
Power-Down
Command n
X
Action n
Maintain power-down
Notes
Self refresh
Clock suspend
X
X
Maintain self refresh
Maintain clock suspend
Deep power-down
X
Maintain deep power-down
5
L
H
H
L
Power-Down
Deep power-down
Self refresh
Clock suspend
All banks idle
All banks idle
COMMAND INHIBIT or NOP
X
COMMAND INHIBIT or NOP
X
COMMAND INHIBIT or NOP
BURST TERMINATE
Exit power-down
Exit deep power-down
Exit self refresh
Exit clock suspend
Power-Down entry
Deep power-down entry
6
5
7
8
5
All banks idle
Reading or Writing
AUTO REFRESH
VALID
Self refresh entry
Clock suspend entry
H
H
Notes:
See Truth Table 3
1. CKE n is the logic state of CKE at clock edge n ; CKE n-1 was the state of CKE at the previous
clock edge.
2. Current state is the state of the SDRAM immediately prior to clock edge n .
3. COMMAND n is the command registered at clock edge n , and ACTION n is a result of COM-
MAND n .
4. All states and sequences not shown are illegal or reserved.
5. Deep power-down is a power-saving feature of this Mobile SDRAM device. This command is
BURST TERMINATE when CKE is HIGH and deep power-down when CKE is LOW.
6. Exiting power-down at clock edge n will put the device in the all banks idle state in time for
clock edge n + 1 (provided that t CKS is met).
7. Exiting self refresh at clock edge n will put the device in the all banks idle state once t XSR is
met. COMMAND INHIBIT or NOP commands should be issued on any clock edges occurring
during the t XSR period. A minimum of two NOP commands must be provided during t XSR
period.
8. After exiting clock suspend at clock edge n , the device will resume operation and recognize
the next command at clock edge n + 1.
PDF: 09005aef8237e877/Source: 09005aef8237e8d8
128Mb_x16 Mobile SDRAM_Y25M_2.fm - Rev. C 2/07 EN
33
Micron Technology, Inc., reserves the right to change products or specifications without notice.
?2006 Micron Technology, Inc. All rights reserved.
相关PDF资料 |
PDF描述 |
|---|---|
| HSM44DRYI | CONN EDGECARD 88POS DIP .156 SLD |
| HMM44DRYI | CONN EDGECARD 88POS DIP .156 SLD |
| RSC49DRYI-S734 | CONN EDGECARD 98POS DIP .100 SLD |
| RMC49DRYI-S734 | CONN EDGECARD 98POS DIP .100 SLD |
| EP4CGX30BF14C8 | IC CYCLONE IV GX FPGA 30K 169FBG |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MT48H8M16LFB4-8 | 制造商:Micron Technology Inc 功能描述:IC SDRAM 128MBIT 125MHZ 54VFBGA |
| MT48H8M16LFB4-8 IT | 制造商:Micron Technology Inc 功能描述:IC SDRAM 128MBIT 125MHZ 54VFBGA |
| MT48H8M16LFB4-8 IT TR | 功能描述:IC SDRAM 128MBIT 125MHZ 54VFBGA RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:96 系列:- 格式 - 存储器:闪存 存储器类型:FLASH 存储容量:16M（2M x 8，1M x 16） 速度:70ns 接口:并联 电源电压:2.65 V ~ 3.6 V 工作温度:-40°C ~ 85°C 封装/外壳:48-TFSOP（0.724"，18.40mm 宽） 供应商设备封装:48-TSOP 包装:托盘 |
发布紧急采购，3分钟左右您将得到回复。