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参数资料
| 型号： | NAND256W3A0AN6F |
| 厂商： | NUMONYX |
| 元件分类： | PROM |
| 英文描述： | 32M X 8 FLASH 3V PROM, 35 ns, PDSO48 |
| 封装： | 12 X 20 MM, ROHS COMPLIANT, PLASTIC, TSOP-48 |
| 文件页数： | 22/58页 |
| 文件大小： | 1406K |
| 代理商： | NAND256W3A0AN6F |
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NAND128-A, NAND256-A
Device operations
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After the read status register command has been issued, the device remains in read status
register mode until another command is issued. therefore if a read status register command
is issued during a random read cycle a new read command must be issued to continue with
a page read.
The status register bits are summarized in Table 11: Status register bits, to which you should
refer in conjunction with the following sections.
6.7.1
Write protection bit (SR7)
The write protection bit identifies if the device is protected or not. If the write protection bit is
set to ‘1’ the device is not protected and program or erase operations are allowed. If the
write protection bit is set to ‘0’ the device is protected and program or erase operations are
not allowed.
6.7.2
P/E/R controller bit (SR6)
The program/erase/read controller bit indicates whether the P/E/R controller is active or
inactive. When the P/E/R controller bit is set to ‘0’, the P/E/R controller is active (device is
busy); when the bit is set to ‘1’, the P/E/R controller is inactive (device is ready).
6.7.3
Error bit (SR0)
The error bit identifies if any errors have been detected by the P/E/R controller. The error bit
is set to ’1’ when a program or erase operation has failed to write the correct data to the
memory. If the error bit is set to ‘0’ the operation has completed successfully.
SR5, SR4, SR3, SR2 and SR1 are reserved.
6.8
Read electronic signature
The device contains a manufacturer code and device code. To read these codes the following
two steps are required:
1.
First use one bus write cycle to issue the Read Electronic Signature command (90h),
followed by an address input of 00h.
2.
Then, perform two bus read operations. The first one reads the manufacturer code and
the second reads the device code. Further bus read operations are ignored.
Table 11.
Status register bits
Bit
Name
Logic level
Definition
SR7
Write protection
'1'
Not protected
'0'
Protected
SR6
Program/erase/read
controller
'1'
P/E/R C inactive, device ready
'0'
P/E/R C active, device busy
SR5, SR4, SR3,
SR2, SR1
Reserved
’don’t care’
SR0
Generic error
‘1’
Error – operation failed
‘0’
No error – operation successful
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PDF描述 |
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| NAND512W3A0AN6T | 64M X 8 FLASH 3V PROM, 35 ns, PDSO48 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| NAND256W3A0AZA6E | 制造商:Micron Technology Inc 功能描述:FLASH PARALLEL 2.7V TO 3.6V 256MBIT 32MX8 12US 55VFBGA - Trays |
| NAND256W3A0AZA6F | 制造商:Micron Technology Inc 功能描述:FLASH PARALLEL 2.7V TO 3.6V 256MBIT 32MX8 12US 55VFBGA - Tape and Reel |
| NAND256W3A0BE06 | 功能描述:闪存 NAND & S.MEDIA FLASH RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel |
| NAND256W3A0BN6E | 制造商:Micron Technology Inc 功能描述:NAND - Trays |
| NAND256W3A0BN6F | 制造商:Micron Technology Inc 功能描述:NAND - Tape and Reel |
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