84
Lattice Semiconductor
Data Sheet
September, 2002
ORCA Series 4 FPGAs
TimingCharacteristics(continued)
Table44.PIOOutputBufferTimingCharacteristics
OR4Exx industrial: VDD15 = 1.425 V, VDD33 = 3.0 V, VDDIO = Min, TJ
=+85 °C.
* SeetheSeries4PIOApplicationnoteforoutputloadconditionsontheseoutputbuffertypes.
Note: Thevaluesintheabovetableshouldbeusedtomodifytheresultsallinformationinthefollowingsystemtimingtables,whichareall
basedon12mAFastTTL(OLVTTL_F12)outputtiming.
Parameter
Symbol
Speed
Unit
Output
Load
(pF)
-1
-2
-3
Min
Max
Min Max Min
Max
OutputDelays
Output Delay Adjustments from OLVTTL_F12:
LVTTL_S6 (Slew Limited, 6 mA)
OUT_LVTTL_S6
—
2.01
—
1.72
—
1.56
ns
30 pF
LVTTL_S12 (Slew Limited, 12 mA)
OUT_LVTTL_S12
—
1.25
—
1.06
—
0.97
ns
30 pF
LVTTL_S24 (Slew Limited, 24 mA)
OUT_LVTTL_S24
—
0.76
—
0.60
—
0.55
ns
30 pF
LVTTL_F6 (Fast, 6 mA)
OUT_LVTTL_F6
—
0.72
—
0.68
—
0.61
ns
30 pF
LVTTL_F24 (Fast, 24 mA)
OUT_LVTTL_F24
—
–0.35
—
–0.32
—
–0.29
ns
30 pF
LVCMOS18_S6 (Slew Limited, 6 mA)
OUT_CMOS18_S6
—
6.91
—
5.36
—
4.87
ns
30 pF
LVCMOS18_S12 (Slew Limited, 12 mA)
OUT_CMOS18_S12
—
6.23
—
3.90
—
3.55
ns
30 pF
LVCMOS18_S24 (Slew Limited, 24 mA)
OUT_CMOS18_S24
—
4.50
—
3.29
—
2.99
ns
30 pF
LVCMOS18_F6 (Fast, 6 mA)
OUT_CMOS18_F6
—
4.75
—
3.83
—
3.48
ns
30 pF
LVCMOS18_F12 (Fast, 12 mA)
OUT_CMOS18_F12
—
2.38
—
1.86
—
1.69
ns
30 pF
LVCMOS18_F24 (Fast, 24 mA)
OUT_CMOS18_F24
—
1.23
—
0.90
—
0.82
ns
30 pF
LVCMOS2_S6 (Slew Limited, 6 mA)
OUT_CMOS18_S6
—
3.26
—
2.66
—
2.42
ns
30 pF
LVCMOS2_S12 (Slew Limited, 12 mA)
OUT_CMOS18_S12
—
2.09
—
1.69
—
1.54
ns
30 pF
LVCMOS2_S24(Slew Limited, 24 mA)
OUT_CMOS18_S24
—
1.58
—
1.23
—
1.12
ns
30 pF
LVCMOS2_F6 (Fast, 6 mA)
OUT_CMOS18_F6
—
1.80
—
1.59
—
1.44
ns
30 pF
LVCMOS2_F12 (Fast, 12 mA)
OUT_CMOS18_F12
—
0.61
—
0.50
—
0.45
ns
30 pF
LVCMOS2_F24 (Fast, 24 mA)
OUT_CMOS18_F24
—
0.03
—
–0.03
—
–0.03
ns
30 pF
LVDS
OUT_LVDS
—
0.07
—
0.00
—
0.00
ns
*
LVPECL
OUT_LVPECL
—
–0.57
—
–0.55
—
–0.50
ns
*
PCI_33 (3.3V)
OUT_PCI_33
—
4.84
—
3.42
—
3.11
ns
10 pF
PCI_66 (3.3V)
OUT_PCI_66
—
4.84
—
3.42
—
3.11
ns
10 pF
GTL
OUT_GTL
—
3.22
—
2.45
—
2.23
ns
*
GTLP (GTL+)
OUT_GTLP
—
3.60
—
2.76
—
2.51
ns
*
HSTL_I
OUT_HSTL_I
—
1.89
—
1.30
—
1.18
ns
20 pF
HSTL_II
OUT_HSTL_II
—
1.89
—
1.30
—
1.18
ns
20 pF
HSTL_III
OUT_HSTL_III
—
2.78
—
1.78
—
1.62
ns
20 pF
HSTL_IV
OUT_HSTL_IV
—
2.78
—
1.78
—
1.62
ns
20 pF
SSTL2_I
OUT_SSTL2_I
—
–0.15
—
–0.18
—
–0.16
ns
30 pF
SSTL2_II
OUT_SSTL2_II
—
–0.15
—
–0.18
—
–0.16
ns
30 pF
SSTL3_I
OUT_SSTL3_I
—
–0.50
—
–0.41
—
–0.37
ns
30 pF
SSTL3_II
OUT_SSTL3_II
—
–0.50
—
–0.41
—
–0.37
ns
30 pF
PECL
OUT_PECL
—
0.12
—
0.16
—
0.15
ns
25 pF
OutputDelayAdjustmentsfromCycleStealing(typicallyusedtoadjustsetupvs.clk->out):
OneDelayCell
OCYCDEL1
0.89
—
0.70
—
0.64
—
ns
—
TwoDelayCells
OCYCDEL2
1.64
—
1.29
—
1.18
—
ns
—
ThreeDelayCells
OCYCDEL3
2.43
—
1.98
—
1.80
—
ns
—