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参数资料
| 型号： | PC34708VM |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 电源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA206 |
| 封装： | 13 X 13 MM, 0.80 MM PITCH, LEAD FREE, MO-275HHAC-1, MAPBGA-206 |
| 文件页数： | 129/200页 |
| 文件大小： | 5160K |
| 代理商： | PC34708VM |
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Analog Integrated Circuit Device Data
Freescale Semiconductor
34
PC34708
Functional Block Requirements and Behaviors
Battery Management Block Description and Application Information
If input current regulation is enabled, when the VBUS voltage drops below the weak VBUSWEAK[2:0] threshold, the charger state
machine will enter input current regulation (due to a weak USB supply), and will decrease the input current limit one step below
its present value. If the USB voltage does not recover (rise back above VBUSWEAK[2:0]), the current limit will be reduced again.
Once the input current limit is at the minimum value (100 mA), if the supply still does not recover, the charger will be shut off and
the WKVBUSDET interrupt will be asserted. If this happens in less than 2.0 ms, the pending VINREGMINT interrupt will be
cancelled, and only the WKVBUSDET interrupt will be asserted. This functionality is enabled by default on power up by the
VBUSWEAKEN SPI bit high (default). The weak VBUS functionality can be disabled by setting the VBUSWEAKEN = 0. When
the following conditions exist: MBATT is present, the charger is capable of supplying >=500 mA, the system is ON, the battery
is bellow 3.4 V, and the input current limit drops to less than 250 mA then, the PMIC will power down the rails. The PMIC will
trickle charge the battery and prohibit the system to power on until the battery reaches the 3.4 V threshold.
The AUX charge input regulation algorithm is different than the USB charge path. The AUX input regulation is enabled by setting
the AUXWEAKEN bit high. It can be disabled by setting the AUXWEAKEN bit low. If the AUXWEAKEN bit is set high, the AUX
charge path will continuously try to regulate the VAUX input to keep it between the VAUXWEAK[2:0] and the VAUXH[2:0]
thresholds. After the trickle charge has completed, the charger will turn on the buck at its lowest input current setting (100 mA),
and then slowly ramp up the current limit every 100 ms. If the VAUX voltage stays above the VAUXTH[2:0] threshold, the charger
will continue to ramp the buck input current limit up to the next setpoint. If the VAUX voltage crosses below the VAUXTH[2:0] and
stays above the VAUXWEAK[2:0] threshold, then the state machine will hold the current setpoint. If the VAUX threshold rises
above the VAUXH[2:0] threshold, the charger will continue increasing the input current limit. Should the VAUX cross below the
VAUXTWEAK[2:0] setpoint, the state machine will rapidly decrease the input current in 120
μs steps. Once the input current limit
is at the minimum value (100 mA), if the supply still does not recover, the charger will be shut off and the WKAUXDET interrupt
will be asserted. When the following conditions exist: MBATT is present, the charger is capable of supplying >=500 mA, the
system is ON, the battery is bellow 3.4 V and the input current limit drops to less than 250 mA then, the PMIC will power down
the rails. The PMIC will trickle charge the battery and prohibit the system to power on, until the battery reaches the 3.4 V
threshold.
The VBUS and VAUX detectors are debounced by the VBUSDB[1:0] and VAUXDB[1:0] SPI bits defined in Table 22. These
debounce periods do not apply to input regulation modes.
7.1.3.5
Trickle Charge Settings
In cases of a deeply discharged battery, the battery will be charged via an internal trickle charge. An internal current source
between VBUSBIN/VAUXVIN and ITRIC provides small currents to the battery, when trickle charging a dead battery for the
resuscitation and ITRICKLE1 modes. The ITRICKLE2 mode will depend on how the TRICKLESEL pin is configured, as shown in
Table 23 and Table 24. If TRICKLESEL is grounded, the ITRICKLE2 current will use the internal trickle charge path. If the
TRICKLESEL is tied to VCOREDIG or floating, then the buck charger will be enabled in constant current mode for ITRICKLE2.
ITRICKLE2 is only valid for configurations where the MBATT FET is not present.
100
4.45
100
4.525
100
3.95
101
4.55
101
4.600
101
4.05
110
4.65
110
4.675
110
4.15
111
4.75
111
4.750
111
4.25
Table 22. VBUS, VAUX Debounce Times
VBUSDB[1:0]
VAUXDB[1:0]
Debounce Time (ms)
00
0
01
10
20
11
30
Table 21. VBUS, VAUX High/low Threshold
VBUSTH[2:0]
VAUXTH[2:0]
Voltage
VBUSWEAK[2:0]
VAUXWEAK[2:0]
Voltage
VBUSTL[2:0]
VAUXTL[2:0]
Voltage
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