
Analog Integrated Circuit Device Data
Freescale Semiconductor
36
PC34708
Functional Block Requirements and Behaviors
Battery Management Block Description and Application Information
7.1.3.6
Battery Thermistor Check Circuitry
A battery pack may be equipped with a thermistor, whose resistance decreases over temperature (NTC). In order to read the
thermistor value, it is biased from the NTCREF pin through a pull-up resistor (RPU). The thermistor check circuit compares the
voltage at BPTHERM with two programmed thresholds, BATTTEMPL[1:0] and BATTTEMPH[1:0]. In addition, the BPTHERM is
sent to the ADC on channel 7 to allow the software to readout the exact temperature of the battery. Charging is allowed when
the thermistor is within the range.
By default, the battery thermistor value is taken into account for charging the battery. Upon detection of a supply at VBUS/VAUX,
the core circuitry powers up. As soon as VCOREDIG is ready, the NTCREF is biased up to VCOREDIG, independent of the state
of the THERM SPI bit. The NTCREF is biased up whenever a battery is detected, the SPI THERM is set, or the charger is
detected (USB or AUX). The resulting voltage at BPTHERM is compared to the corresponding temperature thresholds,
BATTTEMPH and BATTTEMPL. If the voltage at BPTHERM is within range, the charging will behave as previously described.
However, if out of range, the charger state machine will go to a wait state, pause the pre-charge timers, and no current will be
sourced to the battery. When the temperature comes back in range, charging is continued again. The actual behavior depends
on the configuration the charger circuitry at the moment the temperature range is exceeded. The BPTHERM is optimize for a
24 kohm pull-up resistor to NTCREF, and the recommended NTC thermistor from Murata NCP15WB473F03RC or equivalent.
In applications where battery packs without a thermistor may be used, BATTTEMPH[1:0] and BATTTEMPL[1:0] should be left
as the default value and bias the BPTHERM to 0.991 V, in order to get within the temperature window.
7.1.3.7
Charge LEDs Indicators
Since normal LED control via the SPI bus is not always possible in the standalone operation (when the processor is off), two
current sinks are provided at the CHRGLEDR, and CHRGLEDG pins for LEDs connected to the LEDVDD and BP nodes,
respectively.
The CHRGLEDR will be activated when standalone charging is started and will remain under control of the state machine. When
charging is complete, the CHRGLEDR is disabled and the CHRGLEDG is activated. Software can take control over the charging
LEDs, even in standalone mode, by setting the CHRGLEDOVRD=1. When CHRGLEDOVRD=1, the CHRGLEDs are totally
controlled by software, so the state machine no longer has control. With CHRGLEDOVRD=0 (disabled), software cannot force
the LEDs on, but can still set the current.
Table 26. LOWBATT Threshold
LOWBATT[1:0]
L to H transition (Power on)
H to L transition (Low battery detect)
LOWBATT
00
3.1
3.0
01
3.2
3.1
10
3.3
3.2
11 (default)
3.4
3.3
Table 27. Battery Thermistor Temp ranges
BATTTEMPH[1:0]
Temp (°C)
BATTTEMPL[1:0]
Temp (°C)
00
45 (default)
00
0 (default)
01
50
01
5
10
55
10
11
60
11
15