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| 型号： | PC34708VM |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 电源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA206 |
| 封装： | 13 X 13 MM, 0.80 MM PITCH, LEAD FREE, MO-275HHAC-1, MAPBGA-206 |
| 文件页数： | 136/200页 |
| 文件大小： | 5160K |
| 代理商： | PC34708VM |
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Analog Integrated Circuit Device Data
Freescale Semiconductor
40
PC34708
Functional Block Requirements and Behaviors
Battery Management Block Description and Application Information
The CC can be reset by setting the RSTCC bit. This will reset the digital blocks of the CC and will clear the CCOUT[15:0] counter.
The RSTCC bit is automatically cleared at the end of the reset period, which may take up to 40
μs. The CC is started by setting
the STARTCC bit. The CC is disabled by setting this bit low again. This will not reset the CC settings nor its counters, so when
restarting the CC with STARTCC, the count will continue.
While the CC is running it can be calibrated. An analog and a digital offset calibration is available.
The digital portion of the CC is by default permanently corrected for offset and gain errors. This function can be disabled by setting
the CCCALDB bit. However this is not recomended.
The CCCALA bit is set to calibrate the analog portion of the CC. This will disconnect the inputs of the CC from the sense resistor
and will internally short them together. The CCOUT[15:0] counter will accumulate the analog error over time. The calibration
period can be freely chosen by the implementer and depends on the accuracy required. By reading out the contents of the
CCOUT[15:0] and taking into account the calibration period, software can now calculate the error and account for it. Once the
calibration period has finished, the CCCALA bit should be cleared again.
One optional feature is to apply a dithering to the A to D converter, to avoid any error in the measurement due to repetitive events.
To enable dithering, the CCDITHER bit should be set. To make this feature operational, the digital calibration should remain
enabled, so the CCCALDB bit should not be set.
The CC is also used to measure battery charging current when the charger is in Constant Voltage mode, near the end of the
charging cycle. The measured charging current is compared to a programmable threshold to determine when an End of Charge
is reached. A charge complete signal is sent to the charger to indicate completion of the charging cycle.
When the CC is being used to determine the End of Charge, the SPI control bits STARTCC and RSTCC are overridden by
internal logic, to ensure CC is enabled and operating normally. This eliminates any possibility of missing the End of Charge event,
or of falsely declaring an End of Charge prematurely. Note that the ONEC value, CCRES value, and other SPI register values,
can still be actively changed during an End of Charge detection mode. This allows the application software to use a high
resolution setting, such as 100 mC/LSB and a short integration period for rapid End of Charge detection, even though a lower
resolution setting might have been used for Coulomb counting during normal system operation. If the user chooses different
ONEC and CCRES settings for an End of Charge detection vs. normal operation, the system fuel gauge software simply needs
to properly account for the different scale (resolution) of the CCOUT values in each mode, to maintain an accurate count of the
battery state of charge.
To be sure the contents of the CCOUT[15:0] are valid, a CCFAULT bit is available. CCFAULT will be set ‘1’ if the CCOUT counter
has a hardware overflow or underflow. Content is no longer valid, means the bit gets set when a fault condition occurs and stays
latched until cleared in software by writing a ‘1’ to the CCFAULT register. There is no interrupt associated to this bit. The following
fault conditions are covered.
Counter roll over: CCOUT[15:0]=0x8000 HEX
This occurs when the contents of CCOUT[15:0] go from a negative to a positive value or vice versa. Software may incorrectly
interpret the battery charge by this change in polarity. When CCOUT[15:0] becomes equal to 0x8000 HEX, the CCFAULT is set.
The counter stays counting so its contents can still be exploited.
In addition to the CCOUT[15:0] value and CCFAULT status bit discussed earlier, another output for the Coulomb counter digital
control logic is BATTCURRENT[11:0].
The BATTCURRENT value is a read-only value proportional to the current flowing through the sense resistor, which is the
average battery current during the INTEGTIME[1:0] measurement period. The INTEGTIME[1:0] bits select one of four different
integration periods for measuring battery current with the Coulomb counter: 4, 8, 16, or 32 seconds. The longer the integration
time period, the more accurate the battery current measurement, but longer integration times give less frequent updates.
Table 34. Coulomb Counter Resolution
CCRES[1:0]
Resolution
mC/LSB
CCOUT
Dynamic Range
(Coulombs)
CCOUT
Dynamic Range
(mA-Hrs)
00 (default)
100
+/- 3276.8
+/- 910.2
01
200
+/- 6553.6
+/- 1820.4
10
500
+/- 16348.0
+/- 4551.1
11
1000
+/- 32768.0
+/- 9102.2
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