
QuadFALC
TM
PEF 22554 E
Functional Description E1/T1/J1
Data Sheet
110
Rev. 1.2, 2006-01-26
Figure 27
Principle of Configuring the DCO-R and DCO-X Corner Frequencies
The DCO-R reference clock is watched: If one, two or three clock periods of the 2.048 MHz (1.544 MHz in T1/J1
mode) clock at pin SYNC or RCLKI (in single rail digital line interface mode) are missing the DCO-R regulates its
output frequency. If four or more clock periods are missing
The DCO-R circuitry is automatically centered to the nominal bit rate if the center function of DCO-R is enabled
by CMR2.DCF = 0.
The actual DCO-R output frequency is “frozen” if the center function of DCO-R is disabled by CMR2.DCF = 1.
The receive jitter attenuator works in two different modes, selected by the multiplexer “C” in Figure 24:
Slave mode: In slave mode (LIM0.MAS = 0) the DCO-R is synchronized on the recovered route clock. In case
of loss of signal (LOS) the DCO-R switches automatically to Master mode. The frequency at the pin SYNC
must be 2.048 MHz (1.544 MHz). If bit CMR1.DCS is set automatic switching from the recovered route clock
to SYNC is disabled.
Master mode: In master mode (LIM0.MAS = 1) the DCO-R is in free running mode if no clock is supplied on
pin SYNC. If an external clock on the SYNC input is applied, the DCO-R synchronizes to this input. The
external frequency can be 2.048 MHz (1.544 MHz) for IPC.SSYF = 0 or 8.0 kHz for IPC.SSYF = 1.
The following table Table 16 shows this modes with the corresponding synchronization sources.
CMR2
CMR3
CMR6
Corner
frequency
adjust“
DCO-R
(DCO-X)
ECFAX for DCO-X, ECFAR for DCO-R
MUX
Reset
Table
QFALCv3_DCO_X_adjust_2
CFAX (for DCO-X) CFAR (for DCO-R)
LIM2.SCF for DCO-R,
CMR6.SCFX for DCO-X
switches
corner
frequency to
0.2 Hz in E1
corner
frequency
2 or 0.2 Hz
inE1
sets corner
frequency to
2 Hz in E1
MUX
IAX (for DCO-X)
corner
frequency
range 2 …
0.2 Hz in E1
LIM2,
CMR6
Table
IAR (for DCO-R)
CMR5
CMR4
DCOCOMPN
corner
frequency
range8 …
0.2 Hz
PI
P
I
PI