参数资料
型号: QL5842-33BPSN484M
厂商: QUICKLOGIC CORP
元件分类: 总线控制器
英文描述: PCI BUS CONTROLLER, PBGA484
封装: 23 X 23 MM, 2.13 MM HEIGHT, 1 MM PITCH, LEAD FREE, PLASTIC, MS-034AAJ-1, BGA-484
文件页数: 42/76页
文件大小: 1409K
代理商: QL5842-33BPSN484M
2006 QuickLogic Corporation
QL58x2 Enhanced QuickPCI Family Data Sheet Rev. K
47
Power vs. Operating Frequency
The basic power equation which best models power consumption is given below:
PTOTAL = 0.350 + f[0.0031 ηLC + 0.0948 ηCKBF + 0.01 ηCLBF + 0.0263 ηCKLD +
0.543 ηRAM + 0.20 ηPLL + 0.0035 ηINP + 0.0257 ηOUTP] (mW)
Where:
η
LC is the total number of logic cells in the design
η
CKBF = # of clock buffers
η
CLBF = # of column clock buffers
η
CKLD = # of loads connected to the column clock buffers
η
RAM = # of RAM blocks
η
PLL = # of PLLs
η
INP is the number of input pins
η
OUTP is the number of output pins
NOTE: To learn more about power consumption, see QuickLogic Application Note 60 at
http://www.quicklogic.com/images/appnote60.pdf.
Power-Up Sequencing
Figure 45: Power-Up Sequencing
When powering up a device, the V
CC/VCCIO/VDED/VDED2 rails must take 400 s or longer to reach the
maximum value (refer to Figure 45).
NOTE: Ramping V
CC, VCCIO, VPUMP, VDED, or VDED2 faster than 400 s can cause the device to behave
improperly.
For users with a limited power budget, ensure V
CCIO, VDED, VDED2, and VPUMP are within 500 mV of VCC when
ramping up the power supplies.
Vol
tage
V
CCIO
V
DED
V
DED2
V
PUMP
V
CC
|V
CCIO , VDED , VDED2 , VPUMP - VCC|MAX
400 us
V
CC
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