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| 型号： | RTPXA270C0C312 |
| 厂商： | INTEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 312 MHz, RISC PROCESSOR, PBGA356 |
| 封装： | 13 X 13 MM, 1 MM HEIGHT, 0.50 MM PITCH, LEAD FREE, VFBGA-356 |
| 文件页数： | 22/128页 |
| 文件大小： | 1560K |
| 代理商： | RTPXA270C0C312 |
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Glossary-8
Electrical, Mechanical, and Thermal Specification
Intel PXA270 Processor
Glossary
kB/s: Transmission rate expressed in kilobytes per second.
Little endian: Method of storing data that places the least significant byte of multiple-byte values at lower storage
addresses. For example, a 16-bit integer stored in little endian format places the least significant byte at the lower
address and the most significant byte at the next address.
LOA: Loss of bus activity characterized by an SOP without a corresponding EOP.
Low-speed: USB operation at 1.5 Mb/s. See also full-speed and high-speed.
LSb: Least significant bit.
LSB: Least significant byte.
LVDS: Low-voltage differential signal
MAC: Multiply Accumulate unit
Mb/s: Transmission rate expressed in megabits per second.
MB/s: Transmission rate expressed in megabytes per second.
MC: Media Center. A combination digital set-top box, video and music jukebox, personal video recorder and an
Internet gateway and firewall that hooks up to a broadband connection.
Message Pipe: A bidirectional pipe that transfers data using a request/data/status paradigm. The data has an
imposed structure that allows requests to be reliably identified and communicated.
Microframe: A 125 microsecond time base established on high-speed buses.
MMC: Multimedia Card - small form factor memory and I/O card
MMX Technology: The Intel MMX technology comprises a set of instructions that are designed to greatly
enhance the performance of advanced media and communications applications. See chapter 10 of the Intel
Architecture Software Developers Manual, Volume 3: System Programming Guide, Order #245472.
Mobile Station: Cellular Telephone handset
M-PSK: multilevel phase shift keying. A convention for encoding digital data in which there are multiple states.
MMU: Memory Management Unit, part of the Intel XScale core.
MSb: Most significant bit.
MSB: Most significant byte.
MSL: Mobile Scalable Link.
NAK: Handshake packet indicating a negative acknowledgment.
Non Return to Zero Invert (NRZI): A method of encoding serial data in which ones and zeroes are represented by
opposite and alternating high and low voltages where there is no return to zero (reference) voltage between encoded
bits. Eliminates the need for clock pulses.
NRZI: See Non Return to Zero Invert.
Object: Host software or data structure representing a USB entity.
相关PDF资料 |
PDF描述 |
|---|---|
| RCPXA270C0C520 | 520 MHz, MICROPROCESSOR, PBGA356 |
| RV5C387A-F | 0 TIMER(S), REAL TIME CLOCK, PDSO10 |
| RX-4571LC | REAL TIME CLOCK, PDSO12 |
| RX-4571SA | REAL TIME CLOCK, PDSO14 |
| RX-4571SA | 0 TIMER(S), REAL TIME CLOCK, PDSO14 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| RTPXA270C0C416 | 制造商:Intel 功能描述:MPU PXA270 416MHz 3V/3.3V 356-Pin VFBGA |
| RTPXA270C0C624 | 制造商:Intel 功能描述:MPU PXA270 624MHz 3V/3.3V 356-Pin VFBGA |
| RTPXA270C5C208 S L977 | 制造商:Marvell 功能描述:Marvell RTPXA270C5C208 S L977 Microprocessors |
| RTPXA270C5C312 | 功能描述:IC MPU 32BIT 312MHZ 356-PBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - 微处理器 系列:- 标准包装:1 系列:MPC85xx 处理器类型:32-位 MPC85xx PowerQUICC III 特点:- 速度:1.2GHz 电压:1.1V 安装类型:表面贴装 封装/外壳:783-BBGA，FCBGA 供应商设备封装:783-FCPBGA（29x29） 包装:托盘 |
| RTPXA270C5C312 868403 | 制造商:Marvell 功能描述: |
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