参数资料
型号: RTPXA270C0C312
厂商: INTEL CORP
元件分类: 微控制器/微处理器
英文描述: 312 MHz, RISC PROCESSOR, PBGA356
封装: 13 X 13 MM, 1 MM HEIGHT, 0.50 MM PITCH, LEAD FREE, VFBGA-356
文件页数: 73/128页
文件大小: 1560K
代理商: RTPXA270C0C312
Electrical, Mechanical, and Thermal Specification
4-29
Intel PXA270 Processor
Pin Listing and Signal Definitions
The address signals are driven low and data signals are pulled low during sleep, standby, deep-
sleep, frequency-change modes, and manual self-refresh. All other memory control signals are in
the same state that they are in after a hardware reset. If the SDRAMs are in self-refresh mode, they
are kept there by driving SDCKE low.
4.5
Power-Supply Pins
Table 4-5 summarize the power-supply ball count.
§§
nPOE
GPIO (memory controller drives high)
nPWE
GPIO (memory controller drives high)
NOTE:
This indicates that the GPIO pin, if configured for the alternate function
used by the memory controller during reset, drives the represented
value.
NOTE: SCLK<3> is only available on PXA270 processor family packages
1. MA pins are driven
2. MD pins are pulled low
Table 4-4. Memory Controller Pin Reset Values (Sheet 2 of 2)
Pin Name
Reset, Sleep, Standby, Deep-Sleep, Frequency
Change, and Manual Self-Refresh Mode Values
Table 4-5. Discrete (13x13 VF-BGA) Power Supply Pin Summary
Name
Number of Package Balls
13x13 mm VF-BGA
Number of Pachage Balls
23x23 mm PBGA
VCC_BATT
11
VCC_IO
33
VCC_USB
44
VCC_LCD
22
VCC_MEM
19
16
VCC_BB
11
VCC_PLL
11
VCC_SRAM
44
VCC_CORE
14
20
VCC_USIM
11
VSS
65
VSS_IO
99
VSS_MEM
17
VSS_BB
11
VSS_PLL
11
VSS_CORE
56
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