参数资料
型号: SLC88B17QFP
厂商: STANDARD MICROSYSTEMS CORP
元件分类: 总线控制器
英文描述: ISA BUS CONTROLLER, PQFP160
封装: QFP-160
文件页数: 16/54页
文件大小: 333K
代理商: SLC88B17QFP
SMSC DS – SLC88B17
Page 23
Rev. 09/28/99
Any IRQSER Device (i.e., The SLC88B17x) which detects any transition on an IRQ/Data line for which it is
responsible must initiate a Start Frame in order to update the Host Controller unless the IRQSER is already in an
IRQSER Cycle and the IRQ/Data transition can be delivered in that IRQSER Cycle.
2) Continuous (Idle) Mode: Only the Host controller can initiate a Start Frame to update IRQ/Data line information.
All other IRQSER agents become passive and may not initiate a Start Frame. The IRQSER will be driven low for four
to eight clocks by the Host Controller. This mode has two functions. It can be used to stop or idle the IRQSER or the
Host Controller can operate IRQSER in a continuous mode by initiating a Start Frame at the end of every Stop
Frame.
An IRQSER mode transition can only occur during the Stop Frame.
Upon reset, IRQSER bus is defaulted to
Continuous mode, therefore only the Host controller can initiate the first Start Frame. Slaves must continuously
sample the Stop Frames pulse width to determine the next IRQSER Cycle’s mode.
IRQSER Data Frame
Once a Start Frame has been initiated, the SLC88B17x will watch for the rising edge of the Start Pulse and start
counting IRQ/Data Frames from there. Each IRQ/Data Frame is three clocks: Sample phase, Recovery phase, and
Turn-around phase. During the Sample phase the SLC88B17x must drive the IRQSER (SERIRQ pin) low, if and only
if, its last detected IRQ/Data value was low. If its detected IRQ/Data value is high, IRQSER must be left tri-stated.
During the Recovery phase the SLC88B17x must drive the IRQSER high, if and only if, it had driven the IRQSER low
during the previous Sample Phase. During the Turn-around Phase the SLC88B17x must tri-state the IRQSER. The
SLC88B17x will drive the IRQSER low at the appropriate sample point if its associated IRQ/Data line is low,
regardless of which device initiated the Start Frame.
The Sample Phase for each IRQ/Data follows the low to high transition of the Start Frame pulse by a number of
clocks equal to the IRQ/Data Frame times three, minus one. (e.g. The IRQ5 Sample clock is the sixth IRQ/Data
Frame, (6 x 3) - 1 = 17th clock after the rising edge of the Start Pulse).
IRQSER Sampling Periods
IRQSER PERIOD
SIGNAL SAMPLED
# OF CLOCKS PAST START
1
Not Used
2
2IRQ1
5
3
Not Used
8
4IRQ3
11
5IRQ4
14
6IRQ5
17
7IRQ6
20
8IRQ7
23
9IRQ8
26
10
IRQ9
29
11
IRQ10
32
12
IRQ11
35
13
IRQ12
38
14
IRQ13
41
15
IRQ14
44
16
IRQ15
47
17
nIOCHK
50
The IRQSER data frame does not support IRQ2/nSMI from a logical device.
Stop Cycle Control
Once all IRQ/Data Frames have completed the Host Controller will terminate IRQSER activity by initiating a Stop
Frame. Only the Host Controller can initiate the Stop Frame. A Stop Frame is indicated when the IRQSER is low for
two or three clocks. If the Stop Frame’s low time is two clocks then the next IRQSER Cycle’s sampled mode is the
Quiet mode; and any IRQSER device may initiate a Start Frame in the second clock or more after the rising edge of
the Stop Frame’s pulse. If the Stop Frame’s low time is three clocks then the next IRQSER Cycle’s sampled mode is
the Continuos mode; and only the Host Controller may initiate a Start Frame in the second clock or more after the
rising edge of the Stop Frame’s pulse.
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