参数资料
型号: SLC88B17QFP
厂商: STANDARD MICROSYSTEMS CORP
元件分类: 总线控制器
英文描述: ISA BUS CONTROLLER, PQFP160
封装: QFP-160
文件页数: 6/54页
文件大小: 333K
代理商: SLC88B17QFP
SMSC DS – SLC88B17
Page 14
Rev. 09/28/99
PCI/ISA BRIDGE REGISTER DESCRIPTION
The SLC88B17 internal registers are organized to function as an ISA Bridge with other AT compatibility logic. It has
its registers divided into a set of PCI configuration registers.
Some of the SLC88B17 registers contain reserved bits. Software must ensure that the value of reserved bit positions
are preserved. That is, Software must first read the value of the reserved bits, merged the value with the new values
for the other bits and then write back to the register.
Upon reset, the SLC88B17 sets its internal registers to predetermined default states, which represents the minimum
functionality feature set required for the BIOS to bring up the system. It is the responsibility of the BIOS to properly
program the configuration registers to achieve optimal system performance.
The following notation is used to describe register access attributes:
RO
Read Only. Writes have no effect.
WO
Write Only. Reads have no effect.
R/W
Read/Write. The register can be read or written.
R/WC
Read/Write Clear.
A register bit with this attribute can be read and written. However, a write of a 1 clears
the corresponding bit (sets to 0) and a write of a 0 has no effect.
PCI/ISA BRIDGE REGISTER MAPPING
PCI Configuration Register Mapping Table
PCI OFFSET
ADDRESS
MNEMONIC
REGISTER NAME
ACCESS
RIGHT
00-01h
VID
Vendor Identification Register
RO
02-03
DID
Device Identification Register
RO
04-05
PCICMD
PCI Command Register
R/W
06-07
PCISTS
PCI Status Register
R/W/C
08
RID
Revision ID Register
RO
09-0B
CLASSCODE
Class Code Register
RO
0C-0D
Reserved
0E
HEDT
Header Type Register
RO
0F-3F
Reserved
40
IORT
ISA I/O Recovery Timer Register
R/W
41
MISCON
Misc. Control Register
R/W
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