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参数资料
| 型号： | SLC88B17QFP |
| 厂商： | STANDARD MICROSYSTEMS CORP |
| 元件分类： | 总线控制器 |
| 英文描述： | ISA BUS CONTROLLER, PQFP160 |
| 封装： | QFP-160 |
| 文件页数： | 17/54页 |
| 文件大小： | 333K |
| 代理商： | SLC88B17QFP |
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SMSC DS – SLC88B17
Page 24
Rev. 09/28/99
Latency
Latency for IRQ/Data updates over the IRQSER bus in bridge-less systems with the minimum IRQ/Data Frames of
seventeen, will range up to 96 clocks (3.84
S with a 25MHz PCI Bus or 2.88uS with a 33MHz PCI Bus). If one or
more PCI to PCI Bridge is added to a system, the latency for IRQ/Data updates from the secondary or tertiary buses
will be a few clocks longer for synchronous buses, and approximately double for asynchronous buses.
EOI/ISR Read Latency
Any serialized IRQ scheme has a potential implementation issue related to IRQ latency. IRQ latency could cause an
EOI or ISR Read to precede an IRQ transition that it should have followed. This could cause a system fault. The host
interrupt controller is responsible for ensuring that these latency issues are mitigated. The recommended solution is
to delay EOIs and ISR Reads to the interrupt controller by the same amount as the IRQSER Cycle latency in order to
ensure that these events do not occur out of order.
AC/DC Specification Issue
All IRQSER agents must drive / sample IRQSER synchronously related to the rising edge of PCI bus clock. IRQSER
(SERIRQ) pin uses the electrical specification of PCI bus. Electrical parameters will follow PCI spec. section 4,
sustained tri-state.
Reset and Initialization
The IRQSER bus uses RSTDRV as its reset signal. The IRQSER pin is tri-stated by all agents while RSTDRV is
active. With reset, IRQSER Slaves are put into the (continuous) IDLE mode. The Host Controller is responsible for
starting the initial IRQSER Cycle to collect system’s IRQ/Data default values. The system then follows with the
Continuous/Quiet mode protocol (Stop Frame pulse width) for subsequent IRQSER Cycles. It is Host Controller’s
responsibility to provide the default values to 8259’s and other system logic before the first IRQSER Cycle is
performed.
For IRQSER system suspend, insertion, or removal application, the Host controller should be
programmed into Continuous (IDLE) mode first. This is to guarantee IRQSER bus is in IDLE state before the system
configuration changes.
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相关代理商/技术参数 |
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| SLC8B510 | 制造商:ITT 制造商全称:ITT Industries 功能描述:Snap/Clip-Lock Environmentally Sealed - Circular |
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