参数资料
型号: ST7285C
厂商: 意法半导体
英文描述: 8-BIT MCU FOR RDS WITH 48K ROM, 3K RAM, ADC, TWO TIMERS, TWO SPIs, I2C AND SCI INTERFACES
中文描述: 8位微控制器48,000铁路发展策略光盘,3K内存,ADC,两个定时器,2个SPI,I2C和脊髓损伤接口
文件页数: 105/117页
文件大小: 748K
代理商: ST7285C
105/117
ST72E85 ST72T85
1.4 EPROM ERASURE
ST72E85 EPROM devices are erased by expo-
sure to high intensity UV light admitted through the
transparent window. This exposure discharges the
floating gate to its initial state through induced
photo current.
It is recommended that the ST72E85 devices be
kept out of direct sunlight, since the UV content of
sunlight can be sufficient to cause functional fail-
ure. Extended exposure to room level fluorescent
lighting may also cause erasure.
An opaque coating (paint, tape, label, etc...)
should be placed over the package window if the
product is to be operated under these lighting con-
ditions. Covering the window also reduces I
DD
in
power-saving modes due to photo-diode leakage
currents.
An Ultraviolet source of wave length 2537 yield-
ing a total integrated dosage of 15 Watt-sec/cm is
required to erase the ST72E85. The device will be
erased in 15 to 20 minutes if such a UV lamp with
a 12mW/cm power rating is placed 1 inch from the
device window without any interposed filters.
005Ch
005Dh
005Eh
005Fh
0060h
0061h
0062h
0063h
0064h
0065h
0066h
0067h
0068h
0069h
006Ah
006Bh
006Ch
006Dh
006Eh
006Fh
0070h
0071h
0072h to
007Fh
0080h to
0BFFh
0C00h to
0C7Fh
0C80h to
3FFFh
RDS Demodulator
RDS DE1
RDS DE2
RDS DE3
RDS DE4
SR0 -Shift Reg 0
SR1 -Shift Reg 1
SR2 -Shift Reg 2
SR3 -Shift Reg 3
SY0 -Polynomial Reg 0
SY1 -Polynomial Reg 1
GS_CNT Count Reg
GS_INT Interrupt Reg
DR0 -RDSDAT Reg 0
DR1 -RDSDAT Reg 1
DR2 -RDSDAT Reg 2
DR3 -RDSDAT Reg 3
QR0 -QUALITY Reg 0
QR1 -QUALITY Reg 1
QR2 -QUALITY Reg 2
QR3 -QUALITY Reg 3
Data Reg
Control/Status Reg
see register description
RDS GBS
see register description
ADC
XXh
00h
Read Only Register
Read/Write Register
RESERVED
RAM 3K Bytes
of which
STACK 128 Bytes
User variables and subroutine nesting
RESERVED
4000h to
FFDFh
OTP/EPROM 48K
bytes
(49120 bytes)
User application code and data
FFE0h to
FFFFh
User vectors
Interrupt and Reset Vectors
Address
Block
Register name
Reset
Status
Remarks
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