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参数资料
型号： ST92E141K4D1
厂商： STMICROELECTRONICS
元件分类： 微控制器/微处理器
英文描述： 16-BIT, UVPROM, 25 MHz, MICROCONTROLLER, CDIP32
封装： WINDOWED, SHRINK, CERAMIC, DIP-32
文件页数： 156/178页
文件大小： 1097K
代理商： ST92E141K4D1
79/178
ST92141 - I/O PORTS
6 I/O PORTS
6.1 INTRODUCTION
ST9 devices feature flexible individually program-
mable multifunctional input/output lines. Refer to
the Pin Description Chapter for specific pin alloca-
tions. These lines, which are logically grouped as
8-bit ports, can be individually programmed to pro-
vide digital input/output and analog input, or to
connect input/output signals to the on-chip periph-
erals as alternate pin functions. All ports can be in-
dividually configured as an input, bi-directional,
output or alternate function. In addition, pull-ups
can be turned off for open-drain operation, and
weak pull-ups can be turned on in their place, to
avoid the need for off-chip resistive pull-ups. Ports
configured as open drain must never have voltage
on the port pin exceeding VDD (refer to the Electri-
cal Characteristics section). Input buffers can be
either TTL or CMOS compatible. Alternatively
some input buffers can be permanently forced by
hardware to operate as Schmitt triggers.
6.2 SPECIFIC PORT CONFIGURATIONS
Refer to the Pin Description chapter for a list of the
specific port styles and reset values.
6.3 PORT CONTROL REGISTERS
Each port is associated with a Data register
(PxDR) and three Control registers (PxC0, PxC1,
PxC2). These define the port configuration and al-
low dynamic configuration changes during pro-
gram execution. Port Data and Control registers
are mapped into the Register File as shown in Fig-
ure 41. Port Data and Control registers are treated
just like any other general purpose register. There
are no special instructions for port manipulation:
any instruction that can address a register, can ad-
dress the ports. Data can be directly accessed in
the port register, without passing through other
memory or “accumulator” locations.
Figure 41. I/O Register Map
GROUP E
GROUP F
PAGE 2
GROUP F
PAGE 3
GROUP F
PAGE 43
System
Registers
FFh
Reserved
P7DR
P9DR
R255
FEh
P3C2
P7C2
P9C2
R254
FDh
P3C1
P7C1
P9C1
R253
FCh
P3C0
P7C0
P9C0
R252
FBh
Reserved
P6DR
P8DR
R251
FAh
P2C2
P6C2
P8C2
R250
F9h
P2C1
P6C1
P8C1
R249
F8h
P2C0
P6C0
P8C0
R248
F7h
Reserved
R247
F6h
P1C2
P5C2
R246
E5h
P5DR
R229
F5h
P1C1
P5C1
R245
E4h
P4DR
R228
F4h
P1C0
P5C0
R244
E3h
P3DR
R227
F3h
Reserved
R243
E2h
P2DR
R226
F2h
P0C2
P4C2
R242
E1h
P1DR
R225
F1h
P0C1
P4C1
R241
E0h
P0DR
R224
F0h
P0C0
P4C0
R240
1
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