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参数资料
型号： ST92E141K4D1
厂商： STMICROELECTRONICS
元件分类： 微控制器/微处理器
英文描述： 16-BIT, UVPROM, 25 MHz, MICROCONTROLLER, CDIP32
封装： WINDOWED, SHRINK, CERAMIC, DIP-32
文件页数： 58/178页
文件大小： 1097K
代理商： ST92E141K4D1
150/178
ST92141 - ANALOG TO DIGITAL CONVERTER (ADC)
ANALOG TO DIGITAL CONVERTER (Cont’d)
Figure 79. Application Example: Analog Watchdog used in Motorspeed Control
7.6.3 Interrupts
The ADC provides two interrupt sources:
– End of Conversion
– Analog Watchdog Request
The A/D Interrupt Vector Register (IVR) provides
hardware generated flags which indicate the inter-
rupt source, thus allowing automatic selection of
the correct interrupt service routine.
The A/D Interrupt vector should be programmed
by the User to point to the first memory location in
the Interrupt Vector table containing the base ad-
dress of the four byte area of the interrupt vector
table in which the address of the A/D interrupt
service routines are stored.
The Analog Watchdog Interrupt Pending bit (AWD,
ICR.6), is automatically set by hardware whenever
any of the two guarded analog inputs go out of
range. The Compare Result Register (CRR) tracks
the analog inputs which exceed their programmed
thresholds.
When two requests occur simultaneously, the An-
alog Watchdog Request has priority over the End
of Conversion request, which is held pending.
The Analog Watchdog Request requires the user
to poll the Compare Result Register (CRR) to de-
termine which of the four thresholds has been ex-
ceeded. The threshold status bits are set to flag an
out of range condition, and are automatically reset
by hardware after a software reset of the Analog
Watchdog Request flag in the ICR Register. The
interrupt pending flags, ECV and AWD, should be
reset by the user within the interrupt service rou-
tine. Setting either of these two bits by software
will cause an interrupt request to be generated.
Analog
Watch-
dog Re-
quest
70
Lower
Word
Address
X
XX
0
End of
Conv.
Request
70
Upper
Word
Address
X
XX
1
0
9
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