参数资料
型号: TMDXBDKFP5515
厂商: Texas Instruments
文件页数: 34/159页
文件大小: 0K
描述: KIT DEV FINGERPRINT C5515
标准包装: 1
传感器类型: 指纹
接口: USB
电源电压: 5V
嵌入式: 是,MCU,16 位
已供物品: 板,扩展板,线缆,迷你型 DVD,传感器
已用 IC / 零件: C5515
产品目录页面: 718 (CN2011-ZH PDF)
其它名称: 296-27452
SPRS645F – AUGUST 2010 – REVISED OCTOBER 2013
Table 2-14. LCD Bridge Terminal Functions (continued)
SIGNAL
NAME
LCD_D[11]/
I2S2_DX/
GP[27]/
SPI_TX
LCD_D[10]/
I2S2_RX/
GP[20]/
SPI_RX
LCD_D[9]/
I2S2_FS/
GP[19]/
SPI_CS0
LCD_D[8]/
I2S2_CLK
GP[18]/
SPI_CLK
NO.
P12
N11
P11
N10
TYPE (1)
(2)
I/O/Z
I/O/Z
I/O/Z
I/O/Z
OTHER (3)
IPD
DV DDIO
BH
IPD
DV DDIO
BH
IPD
DV DDIO
BH
IPD
DV DDIO
BH
(4)
DESCRIPTION
This pin is multiplexed between LCD Bridge, I2S2, GPIO, and SPI.
For LCD Bridge, it is LCD data pin 11.
Mux control via the PPMODE bits in the EBSR. The IPD resistor on this pin can be
enabled or disabled via the PDINHIBR3 register.
This pin is multiplexed between LCD Bridge, I2S2, GPIO, and SPI.
For LCD Bridge, it is LCD data pin 10.
Mux control via the PPMODE bits in the EBSR. The IPD resistor on this pin can be
enabled or disabled via the PDINHIBR3 register.
This pin is multiplexed between LCD Bridge, I2S2, GPIO, and SPI.
For LCD Bridge, it is LCD data pin 9.
Mux control via the PPMODE bits in the EBSR. The IPD resistor on this pin can be
enabled or disabled via the PDINHIBR3 register.
This pin is multiplexed between LCD Bridge, I2S2, GPIO, and SPI.
For LCD Bridge, it is LCD data pin 8.
Mux control via the PPMODE bits in the EBSR. The IPD resistor on this pin can be
enabled or disabled via the PDINHIBR3 register.
This pin is multiplexed between LCD Bridge and GPIO.
LCD_D[7]/
GP[17]
P10
I/O/Z
IPD
DV DDIO
BH
For LCD Bridge, it is LCD data pin 7.
Mux control via the PPMODE bits in the EBSR. The IPD resistor on this pin can be
enabled or disabled via the PDINHIBR3 register.
This pin is multiplexed between LCD Bridge and GPIO.
LCD_D[6]/
GP[16]
N9
I/O/Z
IPD
DV DDIO
BH
For LCD Bridge, it is LCD data pin 6.
Mux control via the PPMODE bits in the EBSR. The IPD resistor on this pin can be
enabled or disabled via the PDINHIBR3 register.
This pin is multiplexed between LCD Bridge and GPIO.
LCD_D[5]/
GP[15]
P9
I/O/Z
IPD
DV DDIO
BH
For LCD Bridge, it is LCD data pin 5.
Mux control via the PPMODE bits in the EBSR. The IPD resistor on this pin can be
enabled or disabled via the PDINHIBR3 register.
This pin is multiplexed between LCD Bridge and GPIO.
LCD_D[4]/
GP[14]
N8
I/O/Z
IPD
DV DDIO
BH
For LCD Bridge, it is LCD data pin 4.
Mux control via the PPMODE bits in the EBSR. The IPD resistor on this pin can be
enabled or disabled via the PDINHIBR3 register.
This pin is multiplexed between LCD Bridge and GPIO.
LCD_D[3]/
GP[13]
N7
I/O/Z
IPD
DV DDIO
BH
For LCD Bridge, it is LCD data pin 3.
Mux control via the PPMODE bits in the EBSR. The IPD resistor on this pin can be
enabled or disabled via the PDINHIBR3 register.
This pin is multiplexed between LCD Bridge and GPIO.
LCD_D[2]/
GP[12]
P7
I/O/Z
IPD
DV DDIO
BH
For LCD Bridge, it is LCD data pin 2.
Mux control via the PPMODE bits in the EBSR. The IPD resistor on this pin can be
enabled or disabled via the PDINHIBR3 register.
This pin is multiplexed between LCD Bridge and SPI.
LCD_D[1]/
SPI_TX
N6
I/O/Z
DV DDIO
BH
For LCD Bridge, it is LCD data pin 1.
Mux control via the PPMODE bits in the EBSR.
This pin is multiplexed between LCD Bridge and SPI.
LCD_D[0]/
SPI_RX
P6
I/O/Z
DV DDIO
BH
For LCD Bridge, it is LCD data pin 0.
Mux control via the PPMODE bits in the EBSR.
34
Device Overview
Product Folder Links: TMS320C5515
Copyright ? 2010–2013, Texas Instruments Incorporated
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