参数资料
型号: TMS320F241PGS
厂商: TEXAS INSTRUMENTS INC
元件分类: 数字信号处理
英文描述: 0-BIT, 5 MHz, OTHER DSP, PQFP64
封装: PLASTIC, QFP-64
文件页数: 53/122页
文件大小: 1465K
代理商: TMS320F241PGS
TMS320F243, TMS320F241
DSP CONTROLLERS
SPRS064D DECEMBER 1997 REVISED FEBRUARY 2006
36
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
external interrupts
The F243/F241 devices have four external interrupts. These interrupts include:
D XINT1. The XINT1 control register (at 7070h) provides control and status for this interrupt. XINT1 can be used
as a high-priority (Level 1) or low-priority (Level 6) maskable interrupt or as a general-purpose I/O pin. XINT1
can also be programmed to trigger an interrupt on either the rising or the falling edge.
D XINT2. The XINT2 control register (at 7071h) provides control and status for this interrupt. XINT2 can be used
as a high-priority (Level 1) or low-priority (Level 6) maskable interrupt or a general-purpose I/O pin. XINT2 can
also be programmed to trigger an interrupt on either the rising or the falling edge.
D NMI. This is a nonmaskable external interrupt.
D PDPINT. This interrupt is provided for safe operation of power converters and motor drives controlled by
the F243/F241. This maskable interrupt can put the timers and PWM output pins in high-impedance states
and inform the CPU in case of motor drive abnormalities such as overvoltage, overcurrent, and excessive
temperature rise. PDPINT is a Level 1 interrupt.
Table 11 is a summary of the external interrupt capability of the F243/F241.
Table 11. External Interrupt Types and Functions
EXTERNAL
INTERRUPT
CONTROL
REGISTER
NAME
CONTROL
REGISTER
ADDRESS
MASKABLE?
XINT1
XINT1CR
7070h
Yes
(Level 1 or 6)
XINT2
XINT2CR
7071h
Yes
(Level 1 or 6)
NMI
No
PDPINT
EVIMRA
742Ch
Yes
(Level 1)
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