参数资料
型号: TMS320F241PGS
厂商: TEXAS INSTRUMENTS INC
元件分类: 数字信号处理
英文描述: 0-BIT, 5 MHz, OTHER DSP, PQFP64
封装: PLASTIC, QFP-64
文件页数: 7/122页
文件大小: 1465K
代理商: TMS320F241PGS
TMS320F243,TMS320F241
DSP CONTROLLERS
SPRS064D DECEMBER 1997 REVISED FEBRUARY 2006
104
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
operating characteristics over recommended operating condition ranges
PARAMETER
DESCRIPTION
MIN
MAX
UNIT
VCCA = 5.5 V
Converting
10
mA
ICCA
Analog supply current
VCCA = 5.5 V
Non-converting
2
mA
ICCA
Analog supply current
VCCA = VREFHI = 5.5 V
PLL or OSC power
down
1
A
Cai
Analog input capacitance
Typical capacitive load on
Non-sampling
10
pF
Cai
Analog input capacitance
Typical capacitive load on
analog input pin
Sampling
30
pF
EDNL
Differential nonlinearity error
Difference between the actual step width and the ideal
value
±2
LSB
EINL
Integral nonlinearity error
Maximum deviation from the best straight line through
the ADC transfer characteristics, excluding the
quantization error
±2
LSB
td(PU)
Delay time, power-up to ADC valid
Time to stabilize analog stage after power-up
10
s
ZAI
Analog input source impedance
Analog input source impedance for conversions to
remain within specifications
10
Absolute resolution = 4.89 mV. At VREFHI = 5 V and VREFLO =0V, this is one LSB. As VREFHI decreases, VREFLO increases, or both, the LSB size
decreases. Therefore, the absolute accuracy and differential/integral linearity errors in terms of LSBs increase.
LSB denotes “Least Significant Bits”. For example, an error of 2 LSB corresponds to (2 * 4.89) = 9.78 mV.
ADC input pin circuit
One of the most common A/D application errors is inappropriate source impedance. In practice, minimum
source impedance should be used to limit the error as well as to minimize the required sampling time; however,
the source impedance must be smaller than ZAI. A typical ADC input pin circuit is shown in Figure 41.
VIN
R1
Requiv
VAI
(to ADCINx Input)
R1 = 10
Typical
Figure 41. Typical ADC Input Pin Circuit
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