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| 型号： | TS-MAC-SC-UT4 |
| 厂商： | Lattice Semiconductor Corporation |
| 文件页数： | 51/66页 |
| 文件大小： | 0K |
| 描述： | SITE LICENSE ETH MAC TRI SC/SCM |
| 标准包装： | 1 |
| 系列： | * |
| 其它名称： | TSMACSCUT4 |
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Lattice Semiconductor
Application Support
Test Application Registers
There are two address spaces in the test application design. Refer to Table 2-4 on page 25 for a listing of TSMAC
IP Core internal registers. The first address in Table 2-4 on page 25 starts at offset 0x00 and ends at 0x35. This
space contains the TSMAC IP core internal registers.
The second address space shown in Table 5-1 starts at offset 0x8000 and ends at 0x8031. This space contains ID,
control, status and statistics registers used by the test application.
The REGINTF logic block in the test application provides the address decoding, for the RO and R/W registers used
by the test logic and statistics counters. All registers are 8 bits wide and are byte addressable. Note that the statis-
tics counter registers are composed of two 8 bit registers, a low and a high byte register, therefore, in order to
access these registers, two byte accesses must be made. For example, to access to all 16 bits of the RXOKCNT
would require an access to both 0x8019 (high byte) and 0x8018 (low byte). Note that since the statistics counter
registers are clear on read (COR), the high byte should be read first before reading the low byte, since a read of the
low byte clears all the combined 16 bits of the low and high registers. The address map for the test application
Table 5-1. Test Application Related Registers
Address
0x08000
0x08001
0x08002
0x08003
0x08004
0x08005
0x08006
0x08007
0x08008
0x08009
0x0800a
0x0800b
0x0800c, 0x0800d
0x0800e, 0x0800f
0x08010, 0x08011
0x08012, 0x08013
0x08014, 0x08015
0x08016, 0x08017
0x08018, 0x08019
0x0801a, 0x0801b
0x0801c, 0x0801d
0x0801e, 0x0801f
0x08020, 0x08021
0x08022, 0x08023
0x08024, 0x08025
Register Description
VERsion/IDentification Register
TeST CoNTroL Register
TeST CoNTroL Register 2
MAC CoNTroL Register
PAUSe TiMeR Register - Low byte
PAUSe TiMeR Register - High byte
FIFO Almost Full Threshold Register - Low
FIFO Almost Full Threshold Register - High
FIFO Almost Empty Threshold Register - Low
FIFO Almost Empty Threshold Register - High
RX Status Register
TX Status Register
RX Packet Ignored Counter Register (L,H)
RX Length Check Error CouNTer (L,H)
RX Long Frames CouNTer Register (L,H)
RX Short Frames CouNTer Register (L,H)
RX IPG violations CouNTer Register (L,H)
RX CRC errors CouNTer Register (L,H)
RX OK packets CouNTer Register (L,H)
RX Control Frame CouNTer Register (L,H)
RX Pause Frame CouNTer Register (L,H)
RX Multicast Frame CouNTer Register (L,H)
RX Broadcast Frame CouNTer Register (L,H)
RX VLAN tagged Frame CouNTer Register (L,H)
TX Unicast Frame CouNTer Register (L,H)
Mnemonic
VERID
TSTCNTL
TSTCNTL_2
MACCNTL
PAUSTMRL
PAUSTMRH
FIFOAFTL
FIFOAFTH
FIFOAETL
FIFOAETH
RXSTATUS
TXSTATUS
RXPICNT
RXLCECNT
RXLFCNT
RXSFCNT
RXIPGCNT
RXCRCCNT
RXOKCNT
RXCFCNT
RXPFCNT
RXMFCNT
RXBFCNT
RXVFCNT
TXUFCNT
Type
RO
RW
RW
RW
RW
RW
RW
RW
RW
RW
RO/COR
RO/COR
RO/COR
RO/COR
RO/COR
RO/COR
RO/COR
RO/COR
RO/COR
RO/COR
RO/COR
RO/COR
RO/COR
RO/COR
RO/COR
0x08026, 0x08027
TX Pause Frame CouNTer Register
(L,H)
TXPFCNT
RO/COR
0x08028, 0x08029
0x0802a, 0x0802b
TX Multicast Frame CouNTer Register (L,H)
TX Broadcast Frame CouNTer Register (L,H)
TXMFCNT
TXBFCNT
RO/COR
RO/COR
IPUG51_03.0, December 2010
51
Tri-Speed Ethernet MAC User’s Guide
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相关代理商/技术参数 |
参数描述 |
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| TSMACX2U2 | 功能描述:以太网模块 TriSpd Ethernet MAC RoHS:否 制造商:Lantronix 产品:Device Servers 数据速率:300 bps to 921.6 kbps, 10 Mbps, 100 Mbps 接口类型:Ethernet, Serial 工作电源电压:5 V to 15 V 工作电源电流:133 mA to 400 mA 最大工作温度:+ 70 C |
| TS-MAC-X2-U3 | 功能描述:开发软件 Ethernet MAC TriSPD RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| TS-MAC-X2-U4 | 功能描述:开发软件 ETHERNET MAC TRI-SPEED RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| TS-MAC-X2-UT4 | 功能描述:开发软件 ETHERNET MAC TRI-SPEED RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| TSMACXMU2 | 功能描述:以太网模块 TriSpd Ethernet MAC RoHS:否 制造商:Lantronix 产品:Device Servers 数据速率:300 bps to 921.6 kbps, 10 Mbps, 100 Mbps 接口类型:Ethernet, Serial 工作电源电压:5 V to 15 V 工作电源电流:133 mA to 400 mA 最大工作温度:+ 70 C |
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