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参数资料
| 型号： | V58C2256324SAH-40 |
| 厂商： | PROMOS TECHNOLOGIES INC |
| 元件分类： | DRAM |
| 英文描述： | 8M X 32 DDR DRAM, 0.6 ns, PBGA144 |
| 封装： | LEAD FREE, BGA-144 |
| 文件页数： | 33/37页 |
| 文件大小： | 557K |
| 代理商： | V58C2256324SAH-40 |
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V58C2256324SA Rev. 1.0 November 2003
ProMOS TECHNOLOGIES
V58C2256324SA
ModeRegisterSet
ThemoderegisterstoresthedataforcontrollingthevariousoperatingmodesoftheDDRSDRAM.ItprogramsCASlatency,addressing
mode,burstlength,testmode,DLLON andvariousvendorspecificoptions.Thedefault valueof themoderegisterisnot defined.
ThereforethemoderegistermustbewrittenafterpoweruptooperatetheDDRSDRAM.TheDDRSDRAMshouldbeactivatedwith
CKEalreadyhighpriortowritingintotheModeRegister.TheModeRegisteriswrittenbyusingtheMRScommand.Thestateofthe
addresssignalsregisteredinthesamecycleasMRScommandiswritteninthemoderegister.Thevaluecanbechangedaslongas
allbanksareintheidlestate.
Themoderegisterisdividedintovariousfieldsdependingonfunctionality.TheburstlengthusesA2..A0,CASlatency(readlatency
fromcolumnaddress)usesA6..A4.A7isusedfortestmode,A8isusedforDLLReset.A7,A8andBA1mustbesettolowfornormal
DDRSDRAMoperation.A9..A11isreservedforfutureuse.BA0selectsExtendedModeRegisterSetupoperationwhensetto1.Refer
tothetableforspecificcodesforvariousburstlength,addressingmodesandCASlatencies.
ModeRegisterBitmap
BA1
BA0
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
DLL
RFU
TM
CASLatency
BT
BurstLength
A7
0
1
mode
Normal
Testmode
A8
0
1
DLLReset
Yes
DLLReset
No
A3
0
1
Type
Sequential
Reserved
BurstType
AddressBus
ModeRegister
Latency
3
A6
A5
A4
AllotherReserved
4
0
1
0
CASLatency
Length
2
A2
A1
A0
4
8
0
1
Sequential
Interleave
0
8
4
2
BurstLength
AllotherReserved
BA0
0
1
AccessedRegister
Extend.ModeReg.
ExtendedMode
RegisterAccess
ModeRegister
00
A11
A10
RFU
0
5
1
0
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