参数资料
| 型号： | W25Q16DWSSIG |
| 厂商： | Winbond Electronics |
| 文件页数： | 15/85页 |
| 文件大小： | 0K |
| 描述： | IC FLASH SPI 16MBIT 8SOIC |
| 标准包装： | 90 |
| 系列： | SpiFlash® |
| 格式 - 存储器： | 闪存 |
| 存储器类型： | FLASH |
| 存储容量： | 16M（2M x 8） |
| 速度： | 104MHz |
| 接口： | SPI 串行 |
| 电源电压： | 1.65 V ~ 1.95 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-SOIC（0.209"，5.30mm 宽） |
| 供应商设备封装： | 8-SOIC |
| 包装： | 管件 |
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W25Q16DW
the top 4KB sector will become unprotected while the rest of the array become read-only. Please refer to
the Status Register Memory Protection table for details. The default setting is CMP=0.
7.1.7
Status Register Protect (SRP1, SRP0)
The Status Register Protect bits (SRP1 and SRP0) are non-volatile read/write bits in the status register
(S8 and S7). The SRP bits control the method of write protection: software protection, hardware
protection, power supply lock-down or one time programmable (OTP) protection.
until the next power-down, power-up cycle.
Program
SRP1
0
0
0
1
1
SRP0
0
1
1
0
1
/WP
X
0
1
X
X
Status
Register
Software
Protection
Hardware
Protected
Hardware
Unprotected
Power Supply
Lock-Down
One Time
(2)
Description
/WP pin has no control. The Status register can be written to
after a Write Enable instruction, WEL=1. [Factory Default]
When /WP pin is low the Status Register locked and can not
be written to.
When /WP pin is high the Status register is unlocked and can
be written to after a Write Enable instruction, WEL=1.
Status Register is protected and can not be written to again
(1)
Status Register is permanently protected and can not be
written to.
Note:
1. When SRP1, SRP0 = (1, 0), a power-down, power-up cycle will change SRP1, SRP0 to (0, 0) state. 2.
This feature is available upon special order. Please contact Winbond for details.
7.1.8
Erase/Program Suspend Status (SUS)
The Suspend Status bit is a read only bit in the status register (S15) that is set to 1 after executing a
Erase/Program Suspend (75h) instruction. The SUS status bit is cleared to 0 by Erase/Program Resume
(7Ah) instruction as well as a power-down, power-up cycle.
7.1.9
Security Register Lock Bits (LB3, LB2, LB1, LB0)
The Security Register Lock Bits (LB3, LB2, LB1, LB0) are non-volatile One Time Program (OTP) bits in
Status Register (S13, S12, S11, S10) that provide the write protect control and status to the Security
Registers. The default state of LB3-0 is 0, Security Registers are unlocked. LB3-0 can be set to 1
individually using the Write Status Register instruction. LB3-0 are One Time Programmable (OTP), once
it’s set to 1, the corresponding 256-Byte Security Register will become read-only permanently.
7.1.10
Quad Enable (QE)
The Quad Enable (QE) bit is a non-volatile read/write bit in the status register (S9) that allows Quad SPI
and QPI operation. When the QE bit is set to a 0 state (factory default), the /WP pin and /HOLD are
enabled. When the QE bit is set to a 1, the Quad IO2 and IO3 pins are enabled, and /WP and /HOLD
functions are disabled.
QE bit is required to be set to a 1 before issuing an “Enable QPI (38h)” to switch the device from
Standard/Dual/Quad SPI to QPI, otherwise the command will be ignored. When the device is in QPI mode,
Publication Release Date: September 06, 2012
- 15 -
Revision F
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相关代理商/技术参数 |
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| W25Q16DWSSIP | 制造商:WINBOND 制造商全称:Winbond 功能描述:1.8V 16M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI |
| W25Q16DWZPIG | 制造商:Winbond Electronics Corp 功能描述:IC FLASH 16MBIT 104MHZ 8WSON |
| W25Q16DWZPIP | 制造商:WINBOND 制造商全称:Winbond 功能描述:1.8V 16M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI |
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| W25Q16VSFIG | 功能描述:IC FLASH 16MBIT 80MHZ 16SOIC RoHS:是 类别:集成电路 (IC) >> 存储器 系列:SpiFlash® 产品变化通告:Product Discontinuation 26/Apr/2010 标准包装:136 系列:- 格式 - 存储器:RAM 存储器类型:SRAM - 同步，DDR II 存储容量:18M（1M x 18） 速度:200MHz 接口:并联 电源电压:1.7 V ~ 1.9 V 工作温度:0°C ~ 70°C 封装/外壳:165-TBGA 供应商设备封装:165-CABGA（13x15） 包装:托盘 其它名称:71P71804S200BQ |
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