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参数资料
| 型号： | W949D2CBJX5E |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | DRAM |
| 英文描述： | 16M X 32 DDR DRAM, 5 ns, PBGA90 |
| 封装： | 8 X 13 MM, 0.80 MM PITCH, HALOGEN FREE AND LEAD FREE, VFBGA-90 |
| 文件页数： | 26/60页 |
| 文件大小： | 1160K |
| 代理商： | W949D2CBJX5E |
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W949D6CB / W949D2CB
512Mb Mobile LPDDR
Publication Release Date: Jun, 14, 2011
- 32 -
Revision A01-006
7.5.9 Read to Write
Data from READ burst must be completed or truncated before a subsequent WRITE command can be issued. If
truncation is necessary, the BURST TERMINATE command must be used, as shown in following figure for the case
of nominal tDQSS
CL=2
BA,Col n
READ
NOP
CK
Command
Address
DQS
DQ
DM
1) DO n = Data Out from column n; DI b= Data In to column b
2) Burst length = 4, 8 or 16 in the cases shown; If the burst length is 2, the BST command can be omitted
3) Shown with nominal tAC, tDQSCK and tDQSQ
BST
WRITE
NOP
= Don't Care
BA,Col n
READ
WRITE
NOP
BST
NOP
BA,Col b
tDQSS
DO n
CL=3
DQS
DQ
DM
DO n
Command
Address
7.5.10 Read to Pre-charge
A Read burst may be followed by or truncated with a PRECHARGE command to the same bank (provided Auto Pre-
charge was not activated). The PRECHARGE command should be issued X cycles after the READ command,
where X equal the number of desired data-out element pairs. This is shown in following figure. Following the
PRECHARGE command, a subsequent command to the same bank cannot be issued until tRP is met. Note that part
of the row pre-charge time is hidden during the access of the last data-out elements.
In the case of a Read being executed to completion, a PRECHARGE command issued at the optimum time (as
described above) provides the same operation that would result from Read burst with Auto Pre-charge enabled. The
disadvantage of the PRECHARGE command is that it requires that the command and address buses be available at
the appropriate time to issue the command. The advantage of the PRECHARGE command is that it can be used to
truncate bursts.
相关PDF资料 |
PDF描述 |
|---|---|
| WF128K32N-150HC5 | 512K X 8 FLASH 5V PROM MODULE, 150 ns, HIP66 |
| WPS512K8LB-85GM | 512K X 8 STANDARD SRAM, 85 ns, PDSO32 |
| WPS128K32GV-17PJI | 512K X 8 MULTI DEVICE SRAM MODULE, 17 ns, PQMA68 |
| WF2M32B-150HM5 | 8M X 8 FLASH 5V PROM MODULE, 150 ns, CHIP66 |
| WF2M32B-120G2UC5 | 8M X 8 FLASH 5V PROM MODULE, 120 ns, CQFP68 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| W949D2CBJX5ETR | 制造商:Winbond Electronics Corp 功能描述:512M MDDR, X32, 200MHZ |
| W949D2CBJX5I | 制造商:Winbond Electronics Corp 功能描述:DRAM Chip Mobile LPDDR SDRAM 512M-Bit 16Mx32 1.8V 90-Pin VFBGA |
| W949D2CBJX5I TR | 制造商:Winbond Electronics Corp 功能描述:512M MDDR, X32, 200MHZ, INDUST |
| W949D2CBJX6E | 制造商:Winbond Electronics Corp 功能描述:DRAM Chip Mobile LPDDR SDRAM 512M-Bit 16Mx32 1.8V 90-Pin VFBGA |
| W949D2CBJX6ETR | 制造商:Winbond Electronics Corp 功能描述:512M MDDR, X32, 166MHZ, 65NM |
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