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| 型号： | W949D2CBJX5E |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | DRAM |
| 英文描述： | 16M X 32 DDR DRAM, 5 ns, PBGA90 |
| 封装： | 8 X 13 MM, 0.80 MM PITCH, HALOGEN FREE AND LEAD FREE, VFBGA-90 |
| 文件页数： | 33/60页 |
| 文件大小： | 1160K |
| 代理商： | W949D2CBJX5E |
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W949D6CB / W949D2CB
512Mb Mobile LPDDR
Publication Release Date: Jun, 14, 2011
- 39 -
Revision A01-006
7.6.13 Interrupting Write to Precharge
Data for any WRITE burst may be truncated by a subsequent PRECHARGE command as shown in figure below.
Note that only data-in pairs that are registered prior to the tWR period are written to the internal array, and any
subsequent data-in should be masked with DM, as shown in figure. Following the PRECHARGE command, a
subsequent command to the same bank cannot be issued until tRP is met.
BA,Col n
BA a(or
all)
BA,Col b
WRITE
PRE
NOP
CK
Command
Address
1) Dl b = Data in to column b.
2) An interrupted burst of 4, 8 or 16 is shown, 2 data elements are written.
3) tWR is referenced from the positive clock edge after the last desired Data In pair.
4) A10 is LOW with the WRITE command (Auto Precharge is disabled)
5) *1=can be Don't Care for programmed burst length of 4
6) *2=for programmed burst length of 4, DQS becomes Don't Care at this point
NOP
= Don't Care
DQS
DQ
DM
tDQSSmax
tWR
DI b
*1
*2
7.7 Precharge
The PRECHARGE command is used to deactivate the open row in a particular bank or the open row in all banks.
The bank(s) will be available for a subsequent row access a specified time (tRP) after the PRECHARGE command is
issued.
Input A10 determines whether one or all banks are to be precharged. In case where only one bank is to be
precharged, inputs BA0, BA1 select the bank. Otherwise BA0, BA1 are treated as “Dont Care”.
Once a bank has been precharged, it is in the idle state and must be activated prior to any READ or WRITE
command being issued. A PRECHARGE command will be treated as a NOP if there is no open row in that bank, or
if the previously open row is already in the process of precharging.
相关PDF资料 |
PDF描述 |
|---|---|
| WF128K32N-150HC5 | 512K X 8 FLASH 5V PROM MODULE, 150 ns, HIP66 |
| WPS512K8LB-85GM | 512K X 8 STANDARD SRAM, 85 ns, PDSO32 |
| WPS128K32GV-17PJI | 512K X 8 MULTI DEVICE SRAM MODULE, 17 ns, PQMA68 |
| WF2M32B-150HM5 | 8M X 8 FLASH 5V PROM MODULE, 150 ns, CHIP66 |
| WF2M32B-120G2UC5 | 8M X 8 FLASH 5V PROM MODULE, 120 ns, CQFP68 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| W949D2CBJX5ETR | 制造商:Winbond Electronics Corp 功能描述:512M MDDR, X32, 200MHZ |
| W949D2CBJX5I | 制造商:Winbond Electronics Corp 功能描述:DRAM Chip Mobile LPDDR SDRAM 512M-Bit 16Mx32 1.8V 90-Pin VFBGA |
| W949D2CBJX5I TR | 制造商:Winbond Electronics Corp 功能描述:512M MDDR, X32, 200MHZ, INDUST |
| W949D2CBJX6E | 制造商:Winbond Electronics Corp 功能描述:DRAM Chip Mobile LPDDR SDRAM 512M-Bit 16Mx32 1.8V 90-Pin VFBGA |
| W949D2CBJX6ETR | 制造商:Winbond Electronics Corp 功能描述:512M MDDR, X32, 166MHZ, 65NM |
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