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参数资料
型号： XRT75R12DIB-L
厂商： Exar Corporation
文件页数： 126/133页
文件大小： 0K
描述： IC LIU E3/DS3/STS-1 12CH 420TBGA
标准包装： 40
类型： 线路接口装置（LIU）
驱动器/接收器数： 12/12
规程： DS3，E3，STS-1
电源电压： 3.135 V ~ 3.465 V
安装类型： 表面贴装
封装/外壳： 420-LBGA 裸露焊盘
供应商设备封装： 420-TBGA（35x35）
包装： 托盘
XRT75R12D
88
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
REV. 1.0.3
transported across the SDH network (from one PTE to the PTE at the other end of the SDH network). Once
this SDH signal arrives at the remote PTE, this DS3 or E3 signal will then be extracted from the SDH signal,
and will be output to some other DS3/E3 Terminal Equipment for further processing.
Figure 37 presents an illustration of this approach to transporting DS3 data over a SONET Network
As mentioned above a DS3 or E3 signal will be asynchronously mapped into a SONET or SDH signal and then
transported over the SONET or SDH network. At the remote PTE this DS3 or E3 signal will be extracted (or
de-mapped) from this SONET or SDH signal, where it will then be routed to DS3 or E3 terminal equipment for
further processing.
In order to insure that this "de-mapped" DS3 or E3 signal can be routed to any industry-standard DS3 or E3
terminal equipment, without any complications or adverse effect on the network, the Telcordia and ITU-T
standard committees have specified some limits on both the Intrinsic Jitter and Wander that may exist within
these DS3 or E3 signals as they are de-mapped from SONET/SDH. As a consequence, all PTEs that maps
and de-mapped DS3/E3 signals into/from SONET/SDH must be designed such that the DS3 or E3 data that is
de-mapped from SONET/SDH by these PTEs must meet these Intrinsic Jitter and Wander requirements.
As mentioned above, the LIU can assist the System Designer (of SONET/SDH PTE) by ensuring that their
design will meet these Intrinsic Jitter and Wander requirements.
This section of the data sheet will present the following information to the user.
Some background information on Mapping DS3/E3 signals into SONET/SDH and de-mapping DS3/E3
signals from SONET/SDH.
A brief discussion on the causes of jitter and wander within a DS3 or E3 signal that mapped into a SONET/
SDH signal, and is transported across the SONET/SDH Network.
A brief review of these Intrinsic Jitter and Wander requirements in both SONET and SDH applications.
A brief review on the Intrinsic Jitter and Wander measurement results (of a de-mapped DS3 or E3 signal)
whenever the LIU device is used in a system design.
FIGURE 37. A SIMPLE ILLUSTRATION OF A DS3 SIGNAL BEING MAPPED INTO AND TRANSPORTED OVER THE SONET
NETWORK
PTE
SONET
Network
DS3 Data
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