- 您现在的位置：买卖IC网 > PDF目录1194 > ADP1043AFB100EVALZ (Analog Devices Inc)BOARD EVALUATION ADP1043A 100W PDF资料下载
参数资料
| 型号： | ADP1043AFB100EVALZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 19/72页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION ADP1043A 100W |
| 标准包装： | 1 |
| 主要目的： | 电源管理，电源监控器/跟踪器/序列发生器 |
| 已用 IC / 零件： | ADP1043A |
| 主要属性： | * |
| 次要属性： | * |
| 已供物品： | 板 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页当前第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页
ADP1043A
SOFT START
A dedicated filter is used during soft start. The filter is disabled
at the end of the soft start routine, and the voltage loop digital
filter is used.
Fault Condition During Soft Start
If a CS1 fast OCP fault condition occurs during soft start, the
entire soft start routine is reset, and the ADP1043A begins another
soft start routine. All other fault flags are ignored during soft start.
Soft Start Routine
When the user turns on the power supply (enables PSON), the
following soft start procedure occurs:
3.
4.
5.
6.
The soft start begins to ramp up the power supply voltage
at the start of Time t 2 .
The ADP1043A keeps the OrFET gate signal turned off.
The voltage differential across the OrFET increases (VS1 ?
VS2) due to the diode conduction of the OrFET. When the
voltage differential reaches the OrFET enable threshold
(Register 0x30, Bits[5:4]), the OrFET gate signal is enabled
at Time t 3 . The ADP1043A begins to regulate voltage from
VS3 instead of VS1.
After the power supply voltage increases above the VS1 UVP
undervoltage limit (Register 0x34, Bits[6:0]), at the end of
Time t 4 , the UVP flag is reset.
After the UVP flag is reset and if all other PGOOD1 fault
1.
2.
The PSON signal is enabled at Time t 0 . The ADP1043A
checks that initial flags are OK. These flags include VDD
OK and GND OK.
The ADP1043A waits for Time t 1 before it begins soft start.
The length of t 1 is set in Register 0x2C, Bits[4:3].
t 0
conditions are OK, the PGOOD1 signal waits for Time t 5
before it is enabled. The length of t 5 is programmable in
Register 0x2D, Bits[7:4].
t 3
t 1
t 2
t 4
t 5
PSON
SOFT START RAMP
UVP
V OUT VOLTAGE
120mV
(VS1 – VS2) VOLTAGE
GATE SIGNAL
LOOP CONTROLLED FROM VS1
LOOP CONTROLLED FROM VS3
UVP FLAG
PGOOD1
Figure 21. Soft Start Timing Diagram
Rev. 0 | Page 19 of 72
相关PDF资料 |
PDF描述 |
|---|---|
| ADP1046-100-EVALZ | BOARD EVAL FOR ADP1046-100 |
| ADP1048-600-EVALZ | BOARD EVAL ADP1048-600 |
| ADP190CB-EVALZ | BOARD EVAL ADP190 |
| ADP191CB-EVALZ | EVAL BOARD FOR ADP191 |
| ADP194CB-EVALZ | BOARD EVAL FOR ADP194ACBZ |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ADP1043AIF300EVALZ | 制造商:Analog Devices 功能描述:ADP1043A 300W EVALUATION BOARD - Boxed Product (Development Kits) |
| ADP1043A-USB-Z | 功能描述:EVAL BOARD DIG POWER SUPPLY RoHS:是 类别:编程器，开发系统 >> 配件 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program RoHS指令信息:IButton RoHS Compliance Plan 标准包装:1 系列:- 附件类型:USB 至 1-Wire? RJ11 适配器 适用于相关产品:1-Wire? 设备 产品目录页面:1429 (CN2011-ZH PDF) |
| ADP1043-EVALZ | 制造商:Analog Devices 功能描述:EVALUATION BOARDS - Bulk |
| ADP1043FB100-EVALZ | 制造商:Analog Devices 功能描述:ADP1043 100W EVALUATION BOARD |
| ADP1045ACPZ-RL | 制造商:Analog Devices 功能描述: |
发布紧急采购，3分钟左右您将得到回复。