- 您现在的位置：买卖IC网 > PDF目录298814 > ADSP-21365YSWZ-2BA (ANALOG DEVICES INC) 16-BIT, 55.55 MHz, OTHER DSP, PQFP144 PDF资料下载
参数资料
| 型号： | ADSP-21365YSWZ-2BA |
| 厂商： | ANALOG DEVICES INC |
| 元件分类： | 数字信号处理 |
| 英文描述： | 16-BIT, 55.55 MHz, OTHER DSP, PQFP144 |
| 封装： | MS-026BFB-HD, LQFP-144 |
| 文件页数： | 4/56页 |
| 文件大小： | 2748K |
| 代理商： | ADSP-21365YSWZ-2BA |
第1页第2页第3页当前第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页
ADSP-21362/ADSP-21363/ADSP-21364/ADSP-21365/ADSP-21366
PIN FUNCTION DESCRIPTIONS
The ADSP-2136x pin definitions are listed below. Inputs identi
fied as synchronous (S) must meet timing requirements with
respect to CLKIN (or with respect to TCK for TMS and TDI).
Inputs identified as asynchronous (A) can be asserted asynchro
nously to CLKIN (or to TCK for TRST). Tie or pull unused
inputs to VDDEXT or GND, except for the following:
Table 4. Pin Descriptions
DAI_Px, SPICLK, MISO, MOSI, EMU, TMS, TRST, TDI,
and AD15–0 (NOTE: These pins have pull-up resistors.)
The following symbols appear in the Type column of Table 4:
A = asynchronous, G = ground, I = input, O = output,
P = power supply, S = synchronous, (A/D) = active drive,
(O/D) = open drain, and T = three-state, (pd) = pull-down resis
tor, (pu) = pull-up resistor.
Pin
Type
State During and
After Reset
Function
AD15–0
RD
WR
ALE
FLAG3–0
DAI_P20–1
I/O/T
(pu)
O
(pu)
O
(pu)
O
(pd)
I/O/A
I/O/T
(pu)
Three-state with
pull-up enabled
Three-state, driven
high1
Three-state, driven
high1
Three-state, driven
low1
Three-state
Three-state with
programmable
pull-up
Parallel Port Address/Data. The ADSP-2136x parallel port and its corresponding
DMA unit output addresses and data for peripherals on these multiplexed pins. The
multiplex state is determined by the ALE pin. The parallel port can operate in either
8-bit or 16-bit mode. Each AD pin has a 22.5 k
Ω internal pull-up resistor. See
Address/Data Modes on Page 15 for details of the AD pin operation.
For 8-bit mode: ALE is automatically asserted whenever a change occurs in the upper
16 external address bits, A23–8; ALE is used in conjunction with an external latch to
retain the values of the A23–8.
For detailed information on I/O operations and pin multiplexing, see the ADSP-2136x
SHARC Processor Hardware Reference.
Parallel Port Read Enable. RD is asserted low whenever the processor reads 8-bit or
16-bit data from an external memory device. When AD15–0 are flags, this pin remains
deasserted. RD has a 22.5 k
Ω internal pull-up resistor.
Parallel Port Write Enable. WR is asserted low whenever the processor writes 8-bit or
16-bit data to an external memory device. When AD15–0 are flags, this pin remains
deasserted. WR has a 22.5 k
Ω internal pull-up resistor.
Parallel Port Address Latch Enable. ALE is asserted whenever the processor drives
a new address on the parallel port address pins. On reset, ALE is active high. However,
it can be reconfigured using software to be active low. When AD15–0 are flags, this
pin remains deasserted. ALE has a 20 k
Ω internal pull-down resistor.
Flag Pins. Each flag pin is configured via control bits as either an input or output. As
an input, it can be tested as a condition. As an output, it can be used to signal external
peripherals. These pins can be used as an SPI interface slave select output during SPI
mastering. These pins are also multiplexed with the IRQx and the TIMEXP signals. For
detailed information on I/O operations and pin multiplexing, see the ADSP-2136x
SHARC Processor Hardware Reference.
Digital Audio Interface Pins. These pins provide the physical interface to the SRU.
The SRU configuration registers define the combination of on-chip peripheral inputs
or outputs connected to the pin and to the pin’s output enable. The configuration
registers of these peripherals then determines the exact behavior of the pin. Any input
or output signal present in the SRU may be routed to any of these pins. The SRU
provides the connection from the serial ports, input data port, precision clock gener
ators and timers, sample rate converters and SPI to the DAI_P20–1 pins. These pins
have internal 22.5 k
Ω pull-up resistors which are enabled on reset. These pull-ups can
be disabled in the DAI_PIN_PULLUP register.
Rev. B
|
Page 12 of 56
|
June 2007
相关PDF资料 |
PDF描述 |
|---|---|
| ADSP-2181BS-160 | 24-BIT, 20 MHz, OTHER DSP, PQFP128 |
| ADUC845BCPZ8-3 | 8-BIT, FLASH, 12.58 MHz, MICROCONTROLLER, QCC56 |
| ADUM2401ARWZ-RL | SPECIALTY ANALOG CIRCUIT, PDSO16 |
| AE101MD1CQ | TOGGLE SWITCH, SPDT, LATCHED, 2A, 30VDC, THROUGH HOLE-STRAIGHT |
| AE105SD1CB | TOGGLE SWITCH, SPDT, MOMENTARY, 0.02A, 20VDC, THROUGH HOLE-STRAIGHT |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ADSP-21365YSWZ-2CA | 功能描述:IC DSP 32BIT 200MHZ EPAD 144LQFP RoHS:是 类别:集成电路 (IC) >> 嵌入式 - DSP（数字式信号处理器） 系列:SHARC® 标准包装:2 系列:StarCore 类型:SC140 内核 接口:DSI，以太网，RS-232 时钟速率:400MHz 非易失内存:外部 芯片上RAM:1.436MB 电压 - 输入/输出:3.30V 电压 - 核心:1.20V 工作温度:-40°C ~ 105°C 安装类型:表面贴装 封装/外壳:431-BFBGA，FCBGA 供应商设备封装:431-FCPBGA（20x20） 包装:托盘 |
| ADSP-21366 | 制造商:AD 制造商全称:Analog Devices 功能描述:SHARC Processor |
| ADSP-21366BBC-1AA | 功能描述:数字信号处理器和控制器 - DSP, DSC 333 MHz SHARC with on chipRom RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT |
| ADSP-21366BBCZ-1AA | 功能描述:数字信号处理器和控制器 - DSP, DSC 333 MHz SHARC with on chipRom RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT |
| ADSP-21366BSWZ-1AA | 功能描述:IC DSP 32BIT 333MHZ EPAD 144LQFP RoHS:是 类别:集成电路 (IC) >> 嵌入式 - DSP（数字式信号处理器） 系列:SHARC® 标准包装:2 系列:StarCore 类型:SC140 内核 接口:DSI，以太网，RS-232 时钟速率:400MHz 非易失内存:外部 芯片上RAM:1.436MB 电压 - 输入/输出:3.30V 电压 - 核心:1.20V 工作温度:-40°C ~ 105°C 安装类型:表面贴装 封装/外壳:431-BFBGA，FCBGA 供应商设备封装:431-FCPBGA（20x20） 包装:托盘 |
发布紧急采购，3分钟左右您将得到回复。