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参数资料
| 型号： | AT76C551 |
| 厂商： | ATMEL CORP |
| 元件分类： | 通信及网络 |
| 英文描述： | Single Chip Bluetooth Controller(单芯片蓝牙技术控制器) |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP176 |
| 封装： | LQFP-176 |
| 文件页数： | 28/51页 |
| 文件大小： | 845K |
| 代理商： | AT76C551 |
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AT76C551
28
Table
RxFifoCtrlStatus
Addr: 600060 hex
R/W
32-bits
Note:
Default Value: 00000000 hex
Table
RxFifoReadPort
Addr: 600064 hex
R
32-bits
Please note that reading RxFifoReadPort register is mean-
ingfull only if RX FIFO level is at least one, i.e. at least one
byte exists in RX FIFO.
If RX FIFO is not serviced before it is full it will overflow and
subsequent bytes received will be lost. RX FIFO capacity is
64 bytes.
Table
TxFifoCtrlStatus
Addr: 600068 hex
R/W
32-bits
Note:
Default Value: 00000000 hex
TxFifoWritePort
Addr: 60006C hex
W
32-bits
(Note: Writting TxFifoWritePort register is not permitted if
TX FIFO is full.)
If TX FIFO is not serviced before it is empty it will underflow
and transmitted bytes will be lost. TX FIFO capacity is 64
bytes.
Table
hopSelCtrlStatus
Addr: 600070 hex
RW
32-bits
Bits
31...15
Bit 14
R
Bit 13
R
Bit 12
W
Reserved
Empty
Set by HW while FIFO is
empty.
Full
Set by HW while FIFO is
full.
Reset
Set by firmware to discard
any possible FIFO
contents.
Auto-clear.
Set by firmware to define
the minimum level at which
FIFO is considered
“
almost full
”
.
Current FIFO level, i.e.
number of received bytes
into FIFO waiting to be
read.
Bits
11...6
R/W
Threshold[5...0]
Bits 5...0
R
Level[5...0]
Bits
31...8
Bits
7...0
Reserved
RX_byte[7:0]
Least recent received byte
not yet read.
Bits
31...15
Bit 14
R
Bit 13
R
Bit 12
W
Reserved
Empty
Set by HW while FIFO is
empty.
Full
Set by HW while FIFO is
full.
Reset
Set by firmware to discard
any possible FIFO
contents.
Auto-clear
Set by firmware to define
the maximum level at
which FIFO is considered
“
almost empty
”
.
Current FIFO level, i.e.
number of bytes written
into FIFO, waiting to be
transmitted.
Bits
11...6
R/W
Threshold[5...0]
Bits 5...0
R
Level[5...0]
Bits
31...8
Bits
7...0
Reserved
TX_byte[7:0]
Next byte to transmit.
Bits
31...4
Bit 3
Reserved
HopSelEnable_
Busy
Set by firmware and
enables HW frequency
pointer calculation.
Cleared by HW when
calulation is finished
0: 79 frequency Hop
System.
1: 23 frequency Hop
System.
Bit 2
Mode_79_23
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