参数资料
型号: AT76C551
厂商: ATMEL CORP
元件分类: 通信及网络
英文描述: Single Chip Bluetooth Controller(单芯片蓝牙技术控制器)
中文描述: SPECIALTY TELECOM CIRCUIT, PQFP176
封装: LQFP-176
文件页数: 44/51页
文件大小: 845K
代理商: AT76C551
AT76C551
44
Note:
Default Value: 00 hex
Table
Baud Rate Register, Low Byte (US_BL)
Addr: 70001C hex
R/W
8-bits
Note:
Default Value: 00 hex
Table
Baud Rate Register, High Byte (US_BM)
Addr: 700020 hex
R/W
8-bits
Note:
Default Value: 00 hex
Table
Baud Rate generation example (internal UART
clock=14,76923 MHz)
Table
Receiver Time-out Register (US_RTO)
Addr: 700024 hex
R/W
8-bits
Note:
Default Value: 00 hex
Table
Transmitter Time Guard Register (US_TTG)
Addr: 700028 hex
R/W
8-bits
Note:
Default Value: 00 hex
Table
Modem Control Inputs (US_MCI)
Addr: 70002C hex
R
8-bits
Bit 0
STB
Start Break. Break command to
the transmit logic. When set,
starts break condition
Bits
7
0
US_BL
[7:0]
Baud rate generator
division ratio low
The main system clock is
divided by the number
contained in US_BL and
US_BM, to provide the
USART clock (which is 16
times the actual serial
data rate)
Bits
7
0
US_BM
[7:0]
Baud rate generator
division ratio high
Baud Rate
US_BM (hex)
US_BL (hex)
Error
%
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0.16
100
200
400
600
1200
2400
4800
9600
19200
28800
38400
57.6k
115.2k
230.4k
307.2k
460.8k
921.6k
24
12
09
06
03
01
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
80
C0
60
30
20
18
10
08
04
03
02
01
Bits
7
0
US_RTO
[7:0]
This register contains the
maximum period, for which
the UART can wait before a
character arrives, during the
time-out function. This
function is disabled when this
register is zero. The value of
register US_RTO represents
bit periods
Bits
7
0
US_TTG
[7:0]
The value of this register
indicates the delay (in bit
periods) that an active
transmitter has to interpose
between two consecutive
character transmissions
Bit 7
DSR
Data Set Ready: Active high.
This bit is the compliment of the
Data Set Ready (DSR) input pin
Ring Indicator: Active high. This
bit is the compliment of the Ring
Indicator (RI) input pin
Carrier Detect: Active high. This
bit is the compliment of the
Carrier Detect (CD) input pin.
Clear To Send: Active high. This
bit is the compliment of the Clear
To Send (CTS) input pin
Active high.
Logic 0: No DSR change.
Logic 1: The DSR input pin has
changed state since the last time
it was read. An interrupt will be
generated
Bit 6
RI
Bit 5
CD
Bit 4
CTS
Bit 3
DSR change
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