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参数资料
| 型号： | DAC5688IRGCTG4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | DAC |
| 英文描述： | PARALLEL, WORD INPUT LOADING, 0.0104 us SETTLING TIME, 16-BIT DAC, PQCC64 |
| 封装： | 9 X 9 MM, GREEN, PLASTIC, VQFN-64 |
| 文件页数： | 20/56页 |
| 文件大小： | 1321K |
| 代理商： | DAC5688IRGCTG4 |
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D
SDENB
SCLK
SDIO
r/w N1
N0
-
A3 A2
A1 A0
D7 D6 D5
D4 D3 D2 D1
D0 0
InstructionCycle
Data TransferCycle (s)
SDO
D7 D6 D5
D4 D3
2
D1
D0 0
3 pinconfiguration
output
4 pinconfiguration
output
SDENB
SCLK
SDIO
Datan
Datan-1
t d (Data)
SDO
www.ti.com
SLLS880C – DECEMBER 2007 – REVISED AUGUST 2010
Figure 21. Serial Interface Read Timing Diagram
FIR FILTERS
Figure 22 shows the magnitude spectrum response for FIR1, a 67-tap interpolating half-band filter. The transition
band is from 0.4 to 0.6 × fIN (the input data rate for the FIR filter) with <0.002-dB of pass-band ripple and > 80-dB
stop-band attenuation. Figure 23 shows the transition band region from 0.37 to 0.47 × fIN. Up to 0.458 × fIN there
is less than 0.5 dB of attenuation.
Figure 24 shows the magnitude spectrum response for the 19-tap FIR2 filter. The transition band is from 0.25 to
0.75 × fIN (the input data rate for the FIR filter). For 4x interpolation modes, the composite filter response is
shown in Figure 25.
Figure 26 shows the magnitude spectrum response for the 11-tap FIR3 filter. For 8x interpolation modes, the
composite filter response is shown in Figure 27.
The DAC5688 also has a 9-tap non-interpolating inverse sinc filter (FIR4) running at the DAC update rate (fDAC)
that can be used to flatten the frequency response of the sample and hold output. The DAC sample and hold
output set the output current and holds it constant for one DAC clock cycle until the next sample, resulting in the
well known sin(x)/x or sinc(x) frequency response shown in Figure 28 (red dash-dotted line). The inverse sinc
filter response (Figure 28, blue dashed line) has the opposite frequency response between 0 to 0.4 × fDAC,
resulting in the combined response (Figure 28, green solid line). Between 0 to 0.4 × fDAC, the inverse sinc filter
compensates the sample and hold rolloff with less than 0.03-dB error.
The inverse sinc filter has a gain > 1 at all frequencies. Therefore, the signal input to FIR4 must be reduced from
full scale to prevent saturation in the filter. The amount of backoff required depends on the signal frequency, and
is set such that at the signal frequencies the combination of the input signal and filter response is less than 1 (0
dB). For example, if the signal input to FIR4 is at 0.25 × fDAC, the response of FIR4 is 0.9 dB, and the signal must
be backed off from full scale by 0.9 dB. The gain function in the QMC block can be used to set reduce amplitude
of the input signal. The advantage of FIR4 having a positive gain at all frequencies is that the user is then able to
optimized backoff of the signal based on the signal frequency.
The filter taps for all digital filters are listed in Table 4. Note that the loss of signal amplitude may result in lower
SNR due to decrease in signal amplitude.
Copyright 2007–2010, Texas Instruments Incorporated
27
Product Folder Link(s): DAC5688
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