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参数资料
| 型号： | DAC5688IRGCTG4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | DAC |
| 英文描述： | PARALLEL, WORD INPUT LOADING, 0.0104 us SETTLING TIME, 16-BIT DAC, PQCC64 |
| 封装： | 9 X 9 MM, GREEN, PLASTIC, VQFN-64 |
| 文件页数： | 36/56页 |
| 文件大小： | 1321K |
| 代理商： | DAC5688IRGCTG4 |
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RLOAD
AVDD
S(1)
S(1)C
S(2)
S(2)C
S(N)
S(N)C
...
IOUT 1
IOUT 2
RLOAD
www.ti.com
SLLS880C – DECEMBER 2007 – REVISED AUGUST 2010
ANALOG CURRENT OUTPUTS
Figure 45 shows a simplified schematic of the current source array output with corresponding switches.
Differential switches direct the current of each individual NMOS current source to either the positive output node
IOUT1 or its complementary negative output node IOUT2. The output impedance is determined by the stack of
the current sources and differential switches, and is typically >300 k
in parallel with an output capacitance of 5
pF.
The external output resistors are referred to an external ground. The minimum output compliance at nodes
IOUT1 and IOUT2 is limited to AVDD – 0.5 V, determined by the CMOS process. Beyond this value, transistor
breakdown may occur resulting in reduced reliability of the DAC5688 device. The maximum output compliance
voltage at nodes IOUT1 and IOUT2 equals AVDD + 0.5 V. Exceeding the minimum output compliance voltage
adversely affects distortion performance and integral non-linearity. The optimum distortion performance for a
single-ended or differential output is achieved when the maximum full-scale signal at IOUT1 and IOUT2 does not
exceed 0.5 V.
Figure 45. Equivalent Analog Current Output
The DAC5688 can be easily configured to drive a doubly terminated 50
cable using a properly selected RF
doubly terminated transformer configuration with 1:1 and 4:1
impedance ratio, respectively. Note that the center tap of the primary input of the transformer has to be
connected to AVDD to enable a cd current flow. Applying a 20mA full-scale output current would lead to a 0.5
VPP for a 1:1 transformer and a 1 VPP output for a 4:1 transformer. The low dc-impedance between IOUT1 or
IOUT2 and the transformer center tap sets the center of the ac-signal at AVDD, so the 1 VPP output for the 4:1
transformer results in an output between AVDD + 0.5 V and AVDD – 0.5 V.
Copyright 2007–2010, Texas Instruments Incorporated
41
Product Folder Link(s): DAC5688
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