参数资料
型号: EVAL-ADE5169EBZ-2
厂商: Analog Devices Inc
文件页数: 70/156页
文件大小: 0K
描述: BOARD EVALUATION FOR AD5169
标准包装: 1
主要目的: 电源管理,电度表/功率表
嵌入式:
已用 IC / 零件: ADE5169
主要属性: 用于汇编语言和 C 代码的 IAR 工具
次要属性: 隔离和非隔离输出选项
已供物品: 板,软件
? Apparent Power × ? 1 +
? ?
(30)
Apparent Energy = lim ? ∑ Apparent Power ( nT ) × T ? (32)
? n = 0 ?
ADE5166/ADE5169/ADE5566/ADE5569
APPARENT POWER CALCULATION
Apparent power is defined as the maximum power that can be
delivered to a load. V rms and I rms are the effective voltage and current
delivered to the load, respectively. Therefore, the apparent power
(AP) = V rms × I rms . This equation is independent of the phase
angle between the current and the voltage.
Equation 29 gives an expression of the instantaneous power signal
in an ac system with a phase shift.
V ( t ) = 2 × V rms sin( ω t + θ ) (26)
I ( t ) = 2 × I rms sin( ω t + θ ) (27)
P ( t ) = V ( t ) × I ( t ) (28)
P ( t ) = V rms I rms cos( θ ) ? V rms I rms cos( 2 ω t + θ ) (29)
Figure 76 illustrates the signal processing for the calculation of the
apparent power in the ADE5166/ADE5169/ADE5566/ADE5569.
The apparent power signal can be read from the waveform register
by setting the WAVMODE register (Address 0x0D) and setting the
WFSM bit (Bit 5) in the Interrupt Enable 3 SFR (MIRQENH,
Address 0xDB). Like the current and voltage channel waveform
sampling modes, the waveform data is available at sample rates
of 25.6 kSPS, 12.8 kSPS, 6.4 kSPS, or 3.2 kSPS.
The gain of the apparent energy can be adjusted by using the
multiplier and by writing a twos complement, 12-bit word to the
VAGAIN register (VAGAIN, Address 0x1F[11:0]). Equation 30
shows how the gain adjustment is related to the contents of the
VAGAIN register.
Output VAGAIN =
? ? VAGAIN ? ?
? ? 2 12 ? ?
For example, when 0x7FF is written to the VAGAIN register, the
power output is scaled up by 50% (0x7FF = 2048d, 2047/2 12 = 0.5).
Data Sheet
power output. The apparent power is calculated with the current
and voltage rms values obtained in the rms blocks of the
ADE5166/ADE5169/ADE5566/ADE5569.
Apparent Power Offset Calibration
Each rms measurement includes an offset compensation register
to calibrate and eliminate the dc component in the rms value
(see the Current Channel RMS Calculation section and the
Voltage Channel RMS Calculation section). The rms values of the
voltage and current channels are then multiplied together in the
apparent power signal processing. Because no additional offsets are
created in the multiplication of the rms values, there is no specific
offset compensation in the apparent power signal processing. The
offset compensation of the apparent power measurement is deter-
mined by calibrating each individual rms measurement.
APPARENT ENERGY CALCULATION
The apparent energy is given as the integral of the apparent power.
Apparent Energy = ∫ Apparent P ower(t)dt (31)
The ADE5166/ADE5169/ADE5566/ADE5569 achieve the
integration of the apparent power signal by continuously accumu-
lating the apparent power signal in an internal 48-bit register.
The apparent energy register (VAHR, Address 0x07) represents
the upper 24 bits of this internal register. This discrete time
accumulation or summation is equivalent to integration in
continuous time. Equation 32 expresses the relationship.
? ∞ ?
T → 0
where:
n is the discrete time sample number.
T is the discrete time sample period.
The discrete time sample period (T) for the accumulation register
in the ADE5166/ADE5169/ADE5566/ADE5569 is 1.22 μs
(5/MCLK).
Similarly, 0x800 = ?2048d (signed, twos complement), and power
output is scaled by ?50%. Each LSB represents 0.0244% of the
VARMSCFCON
APPARENT POWER
SIGNAL (P)
I rms
V rms
CURRENT RMS SIGNAL – I(t)
0x1CF68C
0x00
VAGAIN
0x1A36E2
VOLTAGE RMS SIGNAL – V(t)
0x1CF68C
TO
DIGITAL-TO-FREQUENCY
CONVERTER
0x00
Figure 76. Apparent Power Signal Processing
Rev. D | Page 70 of 156
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