
GT-48002A Switched Fast Ethernet Controller
2
Revision 1.2
Contents
1. Functional Overview ...........................................................................................................6
1.1
The GalNet Switching Architecture .......................................................................................................... 6
1.2
Fast Ethernet Ports .................................................................................................................................. 6
1.3
Address Recognition ................................................................................................................................ 7
1.4
CPU Packet Routing ................................................................................................................................ 7
1.5
Intervention Mode ..................................................................................................................................... 7
1.6
Network Management Features ............................................................................................................... 7
1.7
DRAM Interface ........................................................................................................................................ 7
1.8
PCI Interface ............................................................................................................................................ 8
2. Pin Information .................................................................................................................... 9
2.1
Logic Symbol ............................................................................................................................................ 9
2.2
Pin Functions and Assignment .............................................................................................................. 10
3. Operational Overview ....................................................................................................... 15
3.1
Enabling/Disabling the GT-48002A ........................................................................................................ 15
3.2
Basic Operation ...................................................................................................................................... 15
3.3
Address Learning ................................................................................................................................... 16
3.4
Packet Buffering ..................................................................................................................................... 16
3.5
Packet Forwarding ................................................................................................................................. 16
3.6
The GalNet Protocol ............................................................................................................................... 16
3.7
Terminology ............................................................................................................................................ 16
4. MAC Address Learning Process...................................................................................... 18
4.1
Address Recognition .............................................................................................................................. 18
4.2
Recovery Process .................................................................................................................................. 18
4.3
Address Aging ........................................................................................................................................ 19
4.4
Static Addresses .................................................................................................................................... 19
4.5
Address Recognition Failure .................................................................................................................. 19
5. GT-48002A Buffers and Queues ...................................................................................... 20
5.1
Rx Buffer Threshold Programming ......................................................................................................... 21
6. Packet Forwarding ............................................................................................................ 22
6.1
Forwarding a Unicast Packet to a Local Port ......................................................................................... 22
6.2
Forwarding a Unicast Packet to a Port in a Different GalNet Device ..................................................... 22
6.3
Forwarding a Multicast Packet ............................................................................................................... 23
6.3.1
Local Ports .............................................................................................................................. 23
6.3.2
Between GalNet Devices ........................................................................................................ 23
6.3.2.1
CPU Disabled ......................................................................................................... 23
6.3.2.2
CPU Enabled .......................................................................................................... 23
6.4
Forwarding a Packet to the CPU Directly ............................................................................................... 24
6.5
Forwarding a Packet from the CPU to a GalNet Device ........................................................................ 26
6.6
CRC Generation ..................................................................................................................................... 27
6.7
Tx Watchdog Timer ................................................................................................................................ 27
7. Device Table Operation .................................................................................................... 28
7.1
Automatic Device Table Initialization ...................................................................................................... 28
7.2
Manual Device Table Initialization .......................................................................................................... 28
7.3
Programming Device Numbers .............................................................................................................. 28