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| 型号： | GT-48002A |
| 厂商： | Galileo Technology Services, LLC |
| 英文描述： | Switched Fast Ethernet Controller for 100BaseX(100BaseX交换式快速以太网控制器) |
| 中文描述： | 交换式快速以太网控制器（100BaseX交换式快速以太网控制器的100BaseX） |
| 文件页数： | 49/102页 |
| 文件大小： | 1001K |
| 代理商： | GT-48002A |
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GT-48002A Switched Fast Ethernet Controller
50
Revision 1.2
12.3.4 Auto-Negotiation, Software Detection
Auto-negotiation is enabled or disabled via a hardware pin. The status of auto-negotiation (enabled or disabled) can be
indirectly evaluated via software. When auto-negotiation is enabled, the CPU does not have write control to the duplex
mode bit in the port control register of both ports. The CPU only has read access of these bits. Therefore, if a CPU can
write modify these bits, and then read these bits to to detect a change, it can conclude that auto-negotiation is DIS-
ABLED. Otherwise, if it cannot change the value of these bits, it can conclude that auto-negotiation is ENABLED. To
avoid detecting changes in this bit during an auto-negotiation cycle, this write/modify/read should be done several
times.
12.4
Backoff Algorithm Options
The GT-48002A implements the truncated exponential backoff algorithm defined by the 802.3 standard. Aggressive-
ness of the backoff algorithm used by all of the ports is controlled by the Limit4 pin. Limit4 controls the number of con-
secutive packet collisions that will occur before the consequtive collision counter is reset. When Limit4 is LOW, the GT-
48002A resets the collision counter after 16 consecutive retransmit trials, restarts the backoff algorithm, and continues
to try and retransmit the frame. A packet which is endlessly colliding on re-transmits will continue to be re-transmitted
forever, only changing backoff intervals. The GT-48002A supports port partitioning on consecutive collisions, a mode
which must be enabled by the CPU. The retransmission is done from the data already stored in the DRAM. In the case
of a successful transmission, the GT-48002A is ready to transmit any other frames queued in its transmit FIFO within
the minimum IPG of the link.
When Limit4 is HIGH, the GT-48002A will reset its collision counter and restarts the backoff algorithm after 4 consecu-
tive transmit trials. This results in the GT-48002A being more aggressive in acquiring the media following a collision.
This will result in better overall switch throughput (less packet loss) in standardized tests. Limit4 can be toggled during
switch operation.
12.5
Data Blinder
The data blinder field (DataBlind in the Serial Parameters register) sets the period of time during which the port does
not look at the wire to decide to transmit (inhibit time.) The default value is 32 bit times.
12.6
Inter-Packet Gap (IPG)
IPG is the idle time between any two successive packets from the same port. The default (from the standard) is 9.6uS
for 10Mbps Ethernet and 960nsec for 100-Mbps Fast Ethernet. Note that the IPG can be made smaller or larger than
the Ethernet standards by programming. Making the IPG smaller can improve test scores at the cost of Ethernet com-
patibility (a trick used by many vendors during head-to-head magazine tests.) We do not recommend this mode of
operation, however, as it violates IEEE standards.
IPG is programmable in the Serial Parameters register.
12.7
10/100 Mbps MII Transmission
When the GT-48002A has a frame ready for transmission, it samples the link activity. If the RxDV signal is inactive (no
activity on the link), and the Inter-packet gap (IPG) counter has expired, frame transmission begins. The data is trans-
mitted via pins TxD[3:0] of the transmitting port, clocked on the rising edge of TxClk. The signal TxEn is asserted at this
same time. In the case of collision, the PHY asserts the CoL signal on the GT-48002A which will then stop transmitting
the frame and append a jam sequence onto the link. After the end of a collided transmission, the GT-48002A will back
off and attempt to retransmit once the backoff counter expires.
A waveform of the signals which are synchronous to TxClk (TxD0[3:0], TxD1[3:0], TxEn[1:0]) is shown in Figure 7. The
actual delay times of the GT-48002A are tighter than the IEEE 802.3u standard, clause 22.3.1, as shown in Table 25.
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