- 您现在的位置：买卖IC网 > PDF目录67672 > GT-48002A (Galileo Technology Services, LLC) Switched Fast Ethernet Controller for 100BaseX(100BaseX交换式快速以太网控制器) PDF资料下载
参数资料
| 型号： | GT-48002A |
| 厂商： | Galileo Technology Services, LLC |
| 英文描述： | Switched Fast Ethernet Controller for 100BaseX(100BaseX交换式快速以太网控制器) |
| 中文描述： | 交换式快速以太网控制器（100BaseX交换式快速以太网控制器的100BaseX） |
| 文件页数： | 82/102页 |
| 文件大小： | 1001K |
| 代理商： | GT-48002A |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页当前第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页
GT-48002A Switched Fast Ethernet Controller
80
Revision 1.2
Interrupt Cause, Offse t: 0x04 4
Bi ts
Fi e l d Na m e
Fun cti o n
In iti a l Va l u e
0
IntSumm
Interrupt Summary.
Logical ‘OR’ of all the interrupt bits.
0x0
1
NewAdd
New Address.
This bit is set by the GT-48002A when a new address
is received.
0x0
2
TxEnd
Tx End of Packet.
This bit is set by the GT-48002A upon transferring a
END_OF_PACKET message to the CPU main mem-
ory.
0x0
3
RxStart
Rx Start of Packet.
This bit is set by the GT-48002A upon sending a
START_OF_PACKET message to the CPU.
0x0
4
AddrRecF
Address Recognition Failed.
This bit is set by the GT-48002A when the address
recognition cycle fails (due to a large number of MAC
addresses).
0x0
5
FlushTxQ
Flush Tx Queue.
This bit is set by the GT-48002A when one of the Tx
queues is flushed due to the Watchdog Timer.
0x0
6
MastRdPar
Master Read Parity.
This bit is set by the GT-48002A upon master read
parity error on the PCI.
0x0
7
MastWrPar
Master Write Parity.
This bit is set by the GT-48002A upon master write
error on the PCI.
0x0
8
AddPar
Address Parity.
This bit is set by the GT-48002A upon address parity
error on the PCI.
0x0
9
MastAbort
Master Abort.
the This bit is set by the GT-48002A upon master
abort on PCI.
0x0
10
TarAbort
Target Abort.
This bit is set by the GT-48002A upon target abort on
the PCI.
0x0
11
LinkChange
Link State Change.
This bit is set by the GT-48002A upon a change in the
link state (down->up, up->down) for any pin.
0x0
12
Part
Partition.
This bit is set by the GT-48002A upon entering Parti-
tion state in one of the ports.
0x0
13
BufWrap
Buffer Wrap-Around.
This bit is set by the GT-48002A upon transferring 16
packets to the CPU main memory.
0x0
相关PDF资料 |
PDF描述 |
|---|---|
| GT-48004A | Four Port Switched Fast Ethernet Controller(四端口、交换式快速以太网控制器) |
| GT-48006A | Low Cost Two Port 10/100Mbps Ethernet Bridge/Switch Controller(低成本、双端口10/100Mbps以太网桥式/交换式控制器) |
| GT-48207 | Advanced Switched Ethernet Controllers for 10+10/100 BaseX(高级交换式 10+10/100 BaseX以太网控制器) |
| GT-48208 | Advanced Switched Ethernet Controllers for 10+10/100 BaseX(高级交换式 10+10/100 BaseX以太网控制器) |
| GT-48212 | Advanced Switched Ethernet Controllers for 10+10/100 BaseX(高级交换式 10+10/100 BaseX以太网控制器) |
相关代理商/技术参数 |
参数描述 |
|---|---|
| GT482 | 制造商:CORNELL DUBILIER ELECTRONICS 功能描述:Cap Ceramic 82pF 3000V SL 5% (12 X 6mm) Radial 9.5mm 85°C |
| GT48212-A6-PBB1C000 | 制造商:Marvell 功能描述: |
| GT48212-A6-PBB-C000 | 制造商:Marvell 功能描述:12 PORT E + 2 PORT FE SWITCH (MANAGED) - Trays |
| GT48300-A1-BBE1C083 | 制造商:Marvell 功能描述:Marvell GT48300-A1-BBE1C083 |
| GT48300-A1-BBE-C000 | 制造商:Marvell 功能描述:Marvell GT48300-A1-BBE-C000 |
发布紧急采购，3分钟左右您将得到回复。