参数资料
型号: HW-SPAR3A-SK-UNI-G
厂商: Xilinx Inc
文件页数: 142/143页
文件大小: 0K
描述: KIT STARTER W/SPARTAN-3A
产品培训模块: FPGAs Spartan3
产品变化通告: Adapter Replacement 23/May/2008
标准包装: 1
系列: Spartan®-3A
类型: FPGA
适用于相关产品: Spartan?3A FPGA,XC3S700A-FG484
所含物品: 板,线缆,文档,电源
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其它名称: 122-1514
Chapter 17: Voltage Supplies
Caution! If the meter offers various current ranges, always start with the largest range first.
Passing too large a current through a meter may damage it.
R
?
?
?
?
Reapply power to the board.
Record the current measurements across the jumper.
If the FPGA design supports the power-saving Suspend mode, measure the current
with the SUSPEND switch (see “SUSPEND Switch,” page 26 ) set in both the “RUN”
and “SUSPEND” positions. The default FPGA application shipped with the Starter
Kit board does use the Suspend mode. For additional information on the Suspend
mode, see XAPP480 : Using Suspend Mode in Spartan-3 Generation FPGAs .
Convert the current measurement (Amperes or mA) to a power measurement (Watts
or mW), by multiplying the measured result by the supply voltage.
I 2 C Voltage Adjustment Interface
Each LP3906 regulator has an two-wire, I 2 C serial interface that optionally controls various
functions, such as the regulator output voltage. As indicated in Table 17-3 , the I 2 C interface
can be controlled by the FPGA application using the I/O pins indicated or by some
external controller using the through-hole mounting pads provided on the board, shown
Table 17-3:
I 2 C Voltage Adjustment Interface to Regulator
Regulator
IC18
IC19
I 2 C Control Input
SCL
SDA
SCL
SDA
FPGA Connection
REG2_SCL
(D11)
REG2_SDA
(F13)
REG1_SCL
(E13)
REG1_SDA
(D13)
Through-Hole
Connection
REG2-SCL
REG2-SDA
REG1-SCL
REG1-SDA
Possible Applications
For experimentation purposes only, Xilinx only recommends adjusting the two supplies
listed below.
?
?
By default, the VCCAUX supply to the FPGA is set to 3.3V. On Spartan-3A FPGAs,
VCCAUX can be either 2.5V or 3.3V, with potentially lower power consumption at
2.5V. Consequently, VCCAUX can be reduced to 2.5V by adjusting the LDO1 output
on the LP3906 regulator designated IC19. The corresponding I 2 C control signals are
REG1_SCL and REG1_SDA.
By default, the reference voltage to Channels C and D on the D/A converter is 3.3V.
However, this voltage can be adjusted to between 1.0V and 3.3V by controlling the
LDO1 output on IC18. The corresponding I 2 C control signals are REG2_SCL and
REG2_SDA. See Chapter 9, “Digital-to-Analog Converter (DAC)” for additional
information.
142
Spartan-3A FPGA Starter Kit Board User Guide
UG330 (v1.3) June 21, 2007
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