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参数资料
型号： HW-SPAR3A-SK-UNI-G
厂商： Xilinx Inc
文件页数： 42/143页
文件大小： 0K
描述： KIT STARTER W/SPARTAN-3A
产品培训模块： FPGAs Spartan3
产品变化通告： Adapter Replacement 23/May/2008
标准包装： 1
系列： Spartan®-3A
类型： FPGA
适用于相关产品： Spartan?3A FPGA，XC3S700A-FG484
所含物品： 板，线缆，文档，电源
相关产品： XC3S700A-5FTG256C-ND - IC FPGA SPARTAN-3A 256K 256FTBGA
122-1722-ND - IC FPGA SPARTAN-3A 256K 256FTBGA
XC3S700A-4FTG256C-ND - IC FPGA SPARTAN-3A 256K 256FTBGA
XC3S700A-5FGG484C-ND - IC SPARTAN-3A FPGA 700K 484FBGA
XC3S700A-5FGG400C-ND - IC SPARTAN-3A FPGA 700K 400FBGA
XC3S700A-5FG484C-ND - IC SPARTAN-3A FPGA 700K 484FBGA
XC3S700A-5FG400C-ND - IC SPARTAN-3A FPGA 700K 400FBGA
XC3S700A-4FG484I-ND - IC SPARTAN-3A FPGA 700K 484FBGA
XC3S700A-4FG484C-ND - IC SPARTAN-3A FPGA 700K 484FBGA
XC3S700A-4FGG484I-ND - IC SPARTAN-3A FPGA 700K 484FBGA
更多...
其它名称： 122-1514
Chapter 4: FPGA Configuration Options
R
Xilinx Platform Flash Configuration PROM(s)
The Spartan-3A Starter Kit board includes a Xilinx Platform Flash configuration interface.
A single 4 Mbit XCF04S Platform Flash PROM appears in the JTAG chain with the FPGA.
Caution! The J46 jumper, shown in Table 4-2, page 42 , enables or disables the Platform Flash
PROM on the board. Be aware of potential data contention issues with the SPI serial Flash and
the D0 line of the parallel NOR Flash, depending on the current FPGA “Configuration Mode
Jumpers” , shown in Table 4-1 .
Caution! If the J46 jumper shown in Table 4-2, page 42 is set for “Always Enabled”, then the
FPGA’s INIT_B pin controls the Platform Flash PROM’s OE/RESET input. The INIT_B pin must
be High to read any data, other than from the Platform Flash PROM.
When using the Platform Flash PROM to configure the FPGA, the configuration mode
jumpers must be set for Master Serial mode, as shown in Table 4-2 . If using any other
configuration mode, the Platform Flash PROM must be disabled.
Table 4-2:
Platform Flash Enable Jumper (J46)
Platform Flash
Mode
Disabled
(no jumper)
Enabled during
FPGA
Configuration
Platform Flash
Enable (J46)
DONE
CE
PROM
GND
J46
DONE
CE
PROM
GND
J46
Allowed FPGA
Configuration Mode
Any
(see Table 4-1 )
Master Serial
or JTAG
Precautions/
Contention
None. Platform Flash disabled.
The FPGA application has full
access to SPI serial Flash and
parallel NOR Flash PROMs after
configuration.
None. Platform Flash enabled
during configuration and
disabled after configuration. The
FPGA application has full access
to SPI serial Flash and parallel
NOR Flash PROMs after
configuration.
DONE
Platform Flash continuously
enabled. The FPGA application
Always
Enabled
CE
PROM
GND
J46
Master Serial
or JTAG
can read additional data from
Platform Flash after
configuration as described in
application note XAPP694:
Reading User Data from
Configuration PROMs . The
FPGA application has no read
access to SPI Flash or parallel
NOR Flash.
PROG Push-button Switch
The PROG push-button switch, labeled in Figure 4-1 , forces the FPGA to reconfigure from
the configuration memory source selected by the “Configuration Mode Jumpers,” page 41 .
Press and release this button to restart the FPGA configuration process at any time.
42
www.xilinx.com
Spartan-3A FPGA Starter Kit Board User Guide
UG330 (v1.3) June 21, 2007
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