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参数资料
型号： ICS1893AFLFT
厂商： IDT, Integrated Device Technology Inc
文件页数： 113/136页
文件大小： 0K
描述： PHYCEIVER LOW PWR 3.3V 48-SSOP
标准包装： 1,000
系列： PHYceiver™
类型： PHY 收发器
规程： MII
电源电压： 3.14 V ~ 3.47 V
安装类型： 表面贴装
封装/外壳： 48-BSSOP（0.295"，7.50mm 宽）
供应商设备封装： 48-SSOP
包装： 带卷 (TR)
其它名称： 1893AFLFT
ICS1893AF, Rev D 10/26/04
October, 2004
78
Chapter 8
Management Register Set
ICS1893AF Data Sheet - Release
Copyright 2004, Integrated Circuit Systems, Inc.
All rights reserved.
8.8
Register 6: Auto-Negotiation Expansion Register
Table 8-13 lists the bits for the Auto-Negotiation Expansion Register, which indicates the status of the
Auto-Negotiation process.
Note:
For an explanation of acronyms used in Table 8-13, see Chapter 1, “Abbreviations and Acronyms”.
As per the IEEE Std 802.3u, during any write operation to any bit in this register, the STA must write the default value
to all Reserved bits.
8.8.1
IEEE Reserved Bits (bits 6.15:5)
The ISO/IEC specification reserves these bits for future use. When an STA:
Reads a reserved bit, the ICS1893AF returns a logic zero.
Writes to a reserved bit, the STA must use the default value specified in this data sheet.
ICS uses some reserved bits to invoke auxiliary functions. To ensure proper operation of the ICS1893AF,
an STA must maintain the default value of these bits. Therefore, ICS recommends that an STA always write
the default value of any reserved bits during all management register write operations.
Reserved bits 5.15:5 are Command Override Write (CW) bits. When the Command Register Override bit
(bit 16.15) is logic:
Zero, the ICS1893AF isolates all STA writes to CW bits.
One, an STA can modify the value of these bits
Table 8-13.
Auto-Negotiation Expansion Register (register 6 [0x06])
Bit
Definition
When Bit = 0
When Bit = 1
Ac-
cess
SF
De-
fault
Hex
6.15
IEEE reserved
Always 0
N/A
CW
–
0
6.14
IEEE reserved
Always 0
N/A
CW
–
0
6.13
IEEE reserved
Always 0
N/A
CW
–
0
6.12
IEEE reserved
Always 0
N/A
CW
–
0
6.11
IEEE reserved
Always 0
N/A
CW
–
0
6.10
IEEE reserved
Always 0
N/A
CW
–
0
6.9
IEEE reserved
Always 0
N/A
CW
–
0
6.8
IEEE reserved
Always 0
N/A
CW
–
0
6.7
IEEE reserved
Always 0
N/A
CW
–
0
6.6
IEEE reserved
Always 0
N/A
CW
–
0
6.5
IEEE reserved
Always 0
N/A
CW
–
0
6.4
Parallel detection fault
No Fault
Multiple technologies
detected
RO
LH
0
6.3
Link partner Next Page
able
Link partner is not Next
Page able
Link partner is Next Page
able
RO
–
0
4
6.2
Next Page able
Local device is not Next
Page able
Local device is Next Page
able
RO
–
1
6.1
Page received
Next Page not received
Next Page received
RO
LH
0
6.0
Link partner
Auto-Negotiation able
Link partner is not
Auto-Negotiation able
Link partner is
Auto-Negotiation able
RO
–
0
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ICS1893AFT 功能描述:PHYCEIVER LOW PWR 3.3V 48-SSOP RoHS:否 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:PHYceiver™ 标准包装:1,000 系列:- 类型:收发器 驱动器/接收器数:2/2 规程:RS232 电源电压:3 V ~ 5.5 V 安装类型:表面贴装 封装/外壳:16-SOIC（0.295"，7.50mm 宽） 供应商设备封装:16-SOIC 包装:带卷 (TR)
ICS1893AG 制造商:ICS 制造商全称:ICS 功能描述:3.3 V 10Base-T/100Base-TX Integrated PHYceiver-TM
ICS1893AGI 制造商:ICS 制造商全称:ICS 功能描述:3.3 V 10Base-T/100Base-TX Integrated PHYceiver-TM
ICS1893AGILF 制造商:ICS 制造商全称:ICS 功能描述:3.3 V 10Base-T/100Base-TX Integrated PHYceiver-TM
ICS1893AGLF 制造商:ICS 制造商全称:ICS 功能描述:3.3 V 10Base-T/100Base-TX Integrated PHYceiver-TM
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